Epson S1D13705 Active high, Panel Data Format, Color/Mono Dual/Single Data Width Bit Function

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	Vancouver Design Center

bit 4	FPLINE Polarity
	This bit controls the polarity of FPLINE in TFT/D-TFD mode (no effect in passive panel
	mode). When this bit = 0, FPLINE is active low. When this bit = 1, FPLINE is active high.
bit 3	FPFRAME Polarity
	This bit controls the polarity of FPFRAME in TFT/D-TFD mode (no effect in passive
	panel mode). When this bit = 0, FPFRAME is active low. When this bit = 1, FPFRAME is
	active high.
bit 2	Mask FPSHIFT
	FPSHIFT is masked during non-display periods if either of the following two criteria is
	met:
	1. Color passive panel is selected (REG[01h] bit 5 = 1)
	2. This bit (REG[01h] bit 2) = 1
bits 1-0	Data Width Bits [1:0]
	These bits select the display data format. See Table 8-1: “Panel Data Format” below for a
	comprehensive description of panel selection.

Table 8-1: Panel Data Format

TFT/STN	Color/Mono	Dual/Single	Data Width	Data Width
			Bit 1	Bit 0	Function
REG[01h] bit 7	REG[01h] bit 5	REG[01h] bit 6
			REG[01h] bit 1	REG[01h] bit 0
			0	0	Mono Single 4-bit passive LCD
		0		1	Mono Single 8-bit passive LCD
			1	0	reserved
	0			1	reserved
			0	0	reserved
		1		1	Mono Dual 8-bit passive LCD
			1	0	reserved
0				1	reserved
			0	0	Color Single 4-bit passive LCD
		0		1	Color Single 8-bit passive LCD format 1
			1	0	reserved
	1			1	Color Single 8-bit passive LCD format 2
			0	0	reserved
		1		1	Color Dual 8-bit passive LCD
			1	0	reserved
				1	reserved
1		X (don’t care)		0	9-bit TFT/D-TFD panel
				1	12-bit TFT/D-TFD panel

S1D13705	Hardware Functional Specification
X27A-A-001-10	Issue Date: 02/02/01