Epson Research and Development

Page 17

Vancouver Design Center

 

 

 

Table 5-1: TMPR3912 to PC Card Slots Address Mapping With and Without the IT8368E

PC Card

TMPR3912

Size

Using the ITE IT8368E

Direct Connection,

Direct Connection,

Slot #

Address

CARDnIOEN=0

CARDnIOEN=1

 

 

 

 

 

 

 

 

 

0C00 0000h

16M byte

Card 2 IO

 

 

 

 

 

 

 

 

 

 

 

S1D13705 (aliased 128

S1D13705

 

2

0D00 0000h

16M byte

times

(aliased 512 times

Card 2 IO

 

 

at 128K byte intervals)

at 128K byte intervals)

 

 

 

 

 

 

 

 

 

 

 

 

0E00 0000h

32M byte

Card 2 Attribute

 

 

 

 

 

 

 

 

 

6800 0000h

64M byte

Card 2 Memory

S1D13705 (aliased 512 times at 128K byte intervals)

 

 

 

 

 

 

5.4 S1D13705 Configuration

The S1D13705 is configured at power up by latching the state of the CNF[3:0] pins. Pin BS# also plays a role in host bus interface configuration. For details on configuration, refer to the S1D13705 Hardware Functional Specification, document number X26A-A-001-xx.

The table below shows those configuration settings relevant to this specific interface.

Table 5-2: S1D13705 Configuration Using the IT8368E

S1D13705

Value hard wired on this pin is used to configure:

Configuration

 

 

 

1 (IO VDD)

 

0 (VSS)

Pin

 

 

 

 

 

BS#

Generic #2

 

Generic #1

CNF3

Big Endian

 

Little Endian

CNF[2:0]

 

111: Generic #1 or #2

 

 

 

 

= configuration for connection using ITE IT8368E

Interfacing to the Toshiba MIPS TMPR3912 Microprocessor

S1D13705

Issue Date: 01/02/13

X27A-G-004-02

Page 377
Image 377
Epson technical manual S1D13705 Configuration Using the IT8368E, 16M byte Card 2 IO, 32M byte Card 2 Attribute