Epson Research and Development

Page 3

Vancouver Design Center

 

 

 

Table of Contents

1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2Interfacing to the NEC VR4181A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1 The NEC VR4181A System Bus . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1.2LCD Memory Access Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3

S1D13705 Host Bus Interface

10

 

3.1

Host Bus Pin Connection

10

 

3.2

Generic #2 Interface Mode

11

4

VR4181A to S1D13705 Interface

12

 

4.1

Hardware Description

12

4.2S1D13705 Hardware Configuration . . . . . . . . . . . . . . . . . . . . . . 13

 

4.3

NEC VR4181A Configuration

14

5

Software

15

6

References

16

 

6.1

Documents

16

 

6.2

Document Sources

16

7

Technical Support

17

7.1Epson LCD Controllers (S1D13705) . . . . . . . . . . . . . . . . . . . . . 17

7.2NEC Electronics Inc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Interfacing to the NEC VR4181A™ Microprocessor

S1D13705

Issue Date: 01/02/13

X27A-G-013-02

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Image 531
Epson S1D13705 Introduction Interfacing to the NEC VR4181A, NEC VR4181A System Bus Overview LCD Memory Access Signals