Epson Research and Development

Page 5

Vancouver Design Center

 

 

 

List of Tables

Table 3-1: Host Bus Interface Pin Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 4-1: S1D13705 Configuration for Direct Connection. . . . . . . . . . . . . . . . . . . . . . 13

Table 5-1: TMPR3912 to PC Card Slots Address Mapping With and Without the IT8368E . . . . . 16

Table 5-2: S1D13705 Configuration Using the IT8368E . . . . . . . . . . . . . . . . . . . . . . . 17

 

List of Figures

Figure 4-1:

S1D13705 to TMPR3912 Direct Connection . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 5-1:

S1D13705 to TMPR3912 Connection Using an IT8368E . . . . . . . . . . . . . . . . . 15

Interfacing to the Toshiba MIPS TMPR3912 Microprocessor

S1D13705

Issue Date: 01/02/13

X27A-G-004-02

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Image 365
Epson technical manual S1D13705 to TMPR3912 Direct Connection, S1D13705 to TMPR3912 Connection Using an IT8368E