EPSON Research and Development

Page 5

Vancouver Design Center

 

 

 

List of Tables

Table 3-1: S1D13704/5 Configuration for Generic #2 Bus Interface . . . . . . . . . . . . . . . . . . . . . . 11

Table 3-2: S1D13704/5 Generic #2 Interface Pin Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

List of Figures

Figure 3-1: S1D13704 to TMPR3912/22U Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

S5U13704/5 - TMPR3912/22U CPU Module

 

Issue Date: 01/03/07

X00A-G-004-02

Page 519
Image 519
Epson S1D13705 technical manual List of Tables, List of Figures