NXP Semiconductors UM10237 4. Brown-out detection, 5. Code security vs. debugging

User manual Rev. 02 — 19 December 2008 40 of 792

NXP Semiconductors UM10237

Chapter 3: LPC24XX System control

[1] Sequence based on round-robin.

4. Brown-out detection

The LPC2400 includes 2-stage monitoring of the voltage on the VDD(3V3) pins. If this

voltage falls below 2.95 V, the Brown-Out Detector (BOD) asserts an interrupt signal to

the Vectored Interrupt Controller. This signal can be enabled for interrupt in the Interrupt

Enable Register in the VIC (see Section 7–3.4 “Interrupt Enable Register (VICIntEnable -

0xFFFF F010)”) in order to cause a CPU interrupt; if not, software can monitor the signal

by reading the Raw Interrupt Status Register (see Section 7–3.3 “Raw Interrupt Status

The second stage of low-voltage detection asserts Reset to inactivate the LPC2400 when

the voltage on the VDD(3V3) pins falls below 2.65 V. This Reset prevents alteration of the

flash as operation of the various elements of the chip would otherwise become unreliable

due to low voltage. The BOD circuit maintains this reset down below 1 V, at which point

the Power-On Reset circuitry maintains the overall Reset.

Both the 2.95 V and 2.65 V thresholds include some hysteresis. In normal operatio n, this

hysteresis allows the 2.95 V detection to reliably interrupt, or a regularly-executed event

loop to sense the condition.

But when Brown-Out Detection is enabled to bring the LPC2400 out of Power-Down mode

(which is itself not a guaranteed operation -- see Section 4–3.4.6 “Power Mode Control

the Wakeup Timer has completed its delay. In this case, the net result of the transient

BOD is that the part wakes up and continues operation after the instructions that set

Power-Down Mode, without any interrupt occurring and with the BOD bit in the RSID

being 0. Since all other wakeup conditions have latching flags (see Section 3–3.1.2

“External Interrupt flag register (EXTINT - 0xE01F C140)” and Section 26–6.2), a wakeup

of this type, without any apparent cause, can be assumed to be a Brown-Out that has

gone away.

5. Code security vs. debugging

Applications in development typically need the debugging and tracing facilities in the

LPC2400. Later in the life cycle of an application, it may be more important to protect the

application code from observation by hostile or competitive eyes. The following feature of

the LPC2400 allows an application to control whether it can be debugged or protected

from observation.

Details on the way Code Read Protection works can be found in Section 30–8 “Code

Read Protection (CRP)”.

Remark: CRP is not available for flashless LPC2400 parts.

Table 38. Priority sequence (bit 0 = 0): Ethernet, CPU

Bit Symbol Description Priority value nn Priority sequence

13:12 EP1 CPU 00 2[1]

18:16 EP2 Ethernet 00 1[1]