NXP Semiconductors UM10237 7.13 I2C Control Register (I2C_CTL - 0xFFE0 C308)

UM10237_2 © NXP B.V. 2008. All rights reserved.
User manual Rev. 02 — 19 December 2008 407 o f 792
NXP Semiconductors UM10237
Chapter 15: LPC24XX USB OTG controller
7.13 I2C Control Register (I2C_CTL - 0xFFE0 C308)
The I2C_CTL register is used to enable interrupts and reset the I2C state machine.
Enabled interrupts cause the USB_I2C_INT interrupt output line to be asserted when set.
8 RFF Receive FIFO Full (RFF). This bit is set when the RX FI FO is full
and cannot accept any more data. It is cleared when the RX
FIFO is not full. If a byte arrives when the Receive FIFO is full,
the SCL is held low until the CPU reads the RX FIFO and makes
room for it.
0
0 RX FIFO is not full
1 RX FIFO is full
9 RFE Receive FIFO Empty. RFE is set when the RX FIFO is empty
and is cleared when the RX FIFO contains valid data. 1
0 RX FIFO contains data.
1 RX FIFO is empty
10 TFF Transmit FIFO Full. TFF is set when the TX FIFO is full and is
cleared when the TX FIFO is not full. 0
0 TX FIFO is not full.
1TX FIFO is full
11 TFE Transmit FIFO Empty. TFE is set when the TX FIFO is empty
and is cleared when the TX FIFO contains valid data. 1
0 TX FIFO contains valid data.
1TX FIFO is empty
31:12 - NA Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined. NA
Table 372. I 2C status register (I2C_STS - address 0xFFE0C304) bit descr iption
Bit Symbol Value Description Reset
Value
Table 373. I2C Contro l register (I2C_CTL - address 0xFFE0 C308) bit description
Bit Symbol Value Description Reset
Value
0 TDIE Transmit Done Interrupt Enable. This enables the TDI interrupt signalling that th is I2C
issued a STOP condition. 0
0 Disable the TDI interrupt.
1 Enable the TDI interrupt.
1 AFIE Transmitter Arbitration Failure Interrupt Enable. This enables the AFI interrupt which is
asserted during transmission when trying to set SDA high, but the bus is driven low by
another device.
0
0 Disable the AFI.
1 Enable the AFI.
2 NAIE Transmitter No Acknowledge Interrupt Enable. This enables the NAI interrupt signalling
that transmitted byte was not acknowledged. 0
0 Disable the NAI.
1 Enable the NAI.