UM10237_2 © NXP B.V. 2008. All rights reserved.
User manual Rev. 02 — 19 December 2008 436 o f 792
NXP Semiconductors UM10237
Chapter 16: LPC24XX Universal Asynchronous Receiver/Transmitter
4.11 IrDA Control Register for UART3 Only (U3ICR - 0xE007 C024)

The IrDA Control Register enables and configures the IrDA mode for UART3 only. The

value of U3ICR should not be changed while transmitting or receiving data, or data loss or

corruption may occur.

The PulseDiv bits in U3ICR are used to select the pulse width when the fixed pulse width

mode is used in IrDA mode (IrDAEn = 1 and FixPulseEn = 1). The value of these bits

should be set so that the resulting pulse width is at least 1.63 µs. Table 16–391 shows the

possible pulse widths.

b. Mode 1 (only start bit is used for auto-baud)
Fig 65. Autobaud a) mode 0 and b) mode 1 waveform
UARTn RX start bit LSB of 'A' or 'a'
rate counter
'A' (0x41) or 'a' (0x61)
start bit0 bit1 bit2 bit3 bit4 bit5 bit6 bit7 parity stop
U1ACR start
16 cycles
16xbaud_rate
Table 390: IrDA Control Register for UART3 only (U3ICR - address 0xE007 C024) bit
description
Bit Symbol Value Description Reset value
0 IrDAEn 0 IrDA mode on UART3 is disabled, UART3 acts as a
standard UART. 0
1 IrDA mode on UART3 is enabled.
1 IrDAInv When 1, the serial input is inverted. This has no effect
on the serial output. When 0, the serial input is not
inverted.
0
2 FixPulseEn When 1, enabled IrDA fixed pulse width mode. 0
5:3 PulseDiv Configures the pulse when FixPulseEn = 1. See text
below for details. 0
31:6 - NA Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
0
Table 391: IrDA Pulse Width
FixPulseEn PulseDiv IrDA Transmitter Pulse width (µs)
0x3 / (16 × baud rate)
102
× TPCLK
114 × TPCLK