UM10237_2 © NXP B.V. 2008. All rights reserved.
User manual Rev. 02 — 19 December 2008 565 o f 792
NXP Semiconductors UM10237
Chapter 21: LPC24XX SD/MMC card interface
While the MCI is in identification mode, the MCICLK frequency must be less than
400 kHz. The clock frequency can be changed to the maximum card bus frequency when
relative card addresses are assigned to all cards.
Note: After a data write, data cannot be written to this register for three MCLK clock
periods plus two PCLK clock periods.
6.3 Argument Register (MCIArgument - 0xE008 C008)
The MCIArgument register contains a 32 bit command argument, which is sent to a card
as part of a command message. Table21–493 shows the bit assignment of the
MCIArgument register.
If a command contains an argument, it must be loaded into the argument register before
writing a command to the command register.
6.4 Command Register (MCICommand - 0xE008 C00C)
The MCICommand register contains the command index and command type bits:
•The command index is sent to a card as part of a command message.
•The command type bits control the Command Path State Machine (CPSM). Writing 1
to the enable bit starts the command send operation, while clearing the bit disables
the CPSM.
Table21–494 shows the bit assignment of the MCICommand register.
Table 492: Clock Control register (MCIClock - address 0xE008 C004) bit description
Bit Symbol Value Description Reset
Value
7:0 ClkDiv MCI bus clock period:
MCLCLK frequency = MCLK / [2×(ClkDiv+1)].
0x00
8 Enable Enable MCI bus clock: 0
0 Clock disabled.
1 Clock enabled.
9 PwrSave Disable MCI clock output when bus is idle: 0
0 Always enabled.
1 Clock enabled when bus is active.
10 Bypass Enable bypass of clock divide logic: 0
0 Disable bypass.
1 Enable bypass. MCLK driven to card bus output (MCICLK).
11 WideBus Enable wide bus mode: 0
0 Standard bus mode (only MCIDAT0 used).
1 Wide bus mode (MCIDAT3:0 used)
31:12 - Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined. NA
Table 493: Argument register (MCIArgument - address 0xE008 C008) bit description
Bit Symbol Description Reset Value
31:0 CmdArg Command argument 0x0000 0000