UM10237_2 © NXP B.V. 2008. All rights reserved.
User manual Rev. 02 — 19 December 2008 716 o f 792
NXP Semiconductors UM10237
Chapter 32: LPC24XX General Purpose DMA (GPDMA) controller
4.2.9 Error conditions

An error during a DMA transfer is flagged directly by the peripheral by asserting an Error

response on the AHB bus during the transfer. The GPDMA automatically disables the

DMA stream after the current transfer has completed, and can optionally generate an

error interrupt to the CPU. This error interrupt can be masked.

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Big Big 32 8 1/[31:24]
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4/[7:0]
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Table 651. Endian behavior
Source
Endian Destination
Endian Source
Width Destination
Width Source
Transfer no/
byte Lane
Source
Data Destination
Transfer no/
byte Lane
Destination
Data