UM10237_2 © NXP B.V. 2008. All rights reserved.
User manual Rev. 02 — 19 December 2008 666 o f 792
NXP Semiconductors UM10237

Chapter 27: LPC24XX WatchDog Timer (WDT)

5. Block diagram

The block diagram of the Watchdog is shown below in the Figure 27–137. The

synchronization logic (PCLK - WDCLK) is not shown in the block diagram.

Fig 137. Watchdog block diagram

WDTC
32 BIT DOWN COUNTER
WDINT WDTOF WDRESET WDEN
SHADOW BIT
reset
interrupt
÷ 4
WDFEED
WDCLKSEL
RTC oscillator
pclk
internal RC oscillator
feed ok
feed error
wdclk
underflow enable
count
WMOD register
feed sequence