Freescale Semiconductor MCF51QE128RM manual 11. D0 Hardware Configuration Info Field Description

ColdFire Core

			Table 7-11. D0 Hardware Configuration Info Field Description
Field			Description
31–24	Processor family. This field is fixed to a hex value of 0xCF indicating a ColdFire core is present.
PF
23–20	ColdFire core version number. Defines the hardware microarchitecture version of ColdFire core.
VER	0001		V1 ColdFire core (This is the value used for this device.)
	0010		V2 ColdFire core
	0011		V3 ColdFire core
	0100		V4 ColdFire core
	0101		V5 ColdFire core
	Else		Reserved for future use.
19–16	Processor revision number. The default is 0b0000.
REV
15	MAC present. This bit signals if the optional multiply-accumulate (MAC) execution engine is present in processor core.
MAC	0	MAC execute engine not present in core. (This is the value used for this device.)
	1	MAC execute engine is present in core.
14	Divide present. This bit signals if the hardware divider (DIV) is present in the processor core.
DIV	0	Divide execute engine not present in core. (This is the value used for this device.)
	1	Divide execute engine is present in core.
13	EMAC present. This bit signals if the optional enhanced multiply-accumulate (EMAC) execution engine is present in
EMAC	processor core.
	0	EMAC execute engine not present in core. (This is the value used for this device.)
	1	EMAC execute engine is present in core.
12	FPU present. This bit signals if the optional floating-point (FPU) execution engine is present in processor core.
FPU	0	FPU execute engine not present in core. (This is the value used for this device.)
	1	FPU execute engine is present in core.
11	MMU present. This bit signals if the optional virtual memory management unit (MMU) is present in processor core.
MMU	0	MMU execute engine not present in core. (This is the value used for this device.)
	1	MMU execute engine is present in core.
10–8	Reserved.
7–4	ISA revision. This 4-bit field defines the instruction-set architecture (ISA) revision level implemented in ColdFire
ISA	processor core.
	0000		ISA_A
	0001		ISA_B
	0010		ISA_C (This is the value used for this device.)
	1000		ISA_A+
	Else		Reserved
3–0	Debug module revision number. This 4-bit field defines revision level of the debug module used in the ColdFire
DEBUG	processor core.
	0000		DEBUG_A
	0001		DEBUG_B
	0010		DEBUG_C
	0011		DEBUG_D
	0100		DEBUG_E
	1001		DEBUG_B+ (This is the value used for this device.)
	1011		DEBUG_D+
	Else		Reserved
			MCF51QE128 MCU Series Reference Manual, Rev. 3
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