Freescale Semiconductor MCF51QE128RM manual Compare Value Low Register Adccvl, Adlpc

Analog-to-Digital Converter (S08ADC12V1)

In 10-bit mode, the ADCCVH register holds the upper two bits of the 10-bit compare value (ADCV9 – ADCV8). These bits are compared to the upper two bits of the result following a conversion in 10-bit mode when the compare function is enabled.

In 8-bit mode, ADCCVH is not used during compare.

11.3.6Compare Value Low Register (ADCCVL)

This register holds the lower 8 bits of the 12-bit or 10-bit compare value or all 8 bits of the 8-bit compare value. Bits ADCV7:ADCV0 are compared to the lower 8 bits of the result following a conversion in 12-bit, 10-bit or 8-bit mode.

R

W

Reset:

7	6	5	4	3	2	1	0
ADCV7	ADCV6	ADCV5	ADCV4	ADCV3	ADCV2	ADCV1	ADCV0
0	0	0	0	0	0	0	0

Figure 11-8. Compare Value Low Register(ADCCVL)

11.3.7Configuration Register (ADCCFG)

ADCCFG selects the mode of operation, clock source, clock divide, and configure for low power or long sample time.

R

W

Reset:

7	6	5	4	3	2	1	0
ADLPC		ADIV	ADLSMP	MODE			ADICLK
0	0	0	0	0	0	0	0

		Figure 11-9. Configuration Register (ADCCFG)
		Table 11-6. ADCCFG Register Field Descriptions
Field		Description
7	Low-Power Configuration. ADLPC controls the speed and power configuration of the successive approximation
ADLPC	converter. This optimizes power consumption when higher sample rates are not required.
	0	High speed configuration
	1	Low power configuration:The power is reduced at the expense of maximum clock speed.
6:5	Clock Divide Select. ADIV selects the divide ratio used by the ADC to generate the internal clock ADCK.
ADIV	Table 11-7shows the available clock configurations.
4	Long Sample Time Configuration. ADLSMP selects between long and short sample time. This adjusts the
ADLSMP	sample period to allow higher impedance inputs to be accurately sampled or to maximize conversion speed for
	lower impedance inputs. Longer sample times can also be used to lower overall power consumption when
	continuous conversions are enabled if high conversion rates are not required.
	0	Short sample time
	1	Long sample time

MCF51QE128 MCU Series Reference Manual, Rev. 3

Freescale Semiconductor 225

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