Freescale Semiconductor MCF51QE128RM manual Example Mass Erase Command Flow

Chapter 4 Memory

4.5.2.5Mass Erase Command

The mass erase operation erases the entire flash array memory using an embedded algorithm. An example flow to execute the mass erase operation is shown in Figure 4-14. The mass erase command write sequence is as follows:

1.Write to an aligned flash block address to start the command write sequence for the mass erase command. The address and data written is ignored.

2.Write the mass erase command, 0x41, to the FCMD register.

3.Clear the FCBEF flag in the FSTAT register by writing a 1 to FCBEF to launch the mass erase command.

If the flash array memory to be mass erased contains any protected area, FSTAT[FPVIOL] is set and the mass erase command does not launch. After the mass erase command has successfully launched and the mass erase operation has completed, FSTAT[FCCF] is set.

START

Read: FCDIV register

Clock Register

FDIVLD

WrittenSet? Check

yes

	no	Note: FCDIV needs to
		be set after each reset
Write: FCDIV register

Read: FSTAT register

Command	FCBEF	no
Buffer Empty Check	Set?
	yes

Access Error and	FACCERR/FPVIOL yes
Protection Violation	Set?
Check	no
1.	Write: Flash Memory Address
	and Dummy Data

Write: FSTAT register

Clear FACCERR/FPVIOL 0x30

2.

3.

Write: FCMD register

Mass Erase Command 0x41

Write: FSTAT register

Clear FCBEF 0x80

Read: FSTAT register

Bit Polling for	FCCF	no
Command Completion
	Set?
Check
	yes
	EXIT

Figure 4-14. Example Mass Erase Command Flow

MCF51QE128 MCU Series Reference Manual, Rev. 3

86 Freescale Semiconductor

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