Chapter 4 Memory

 

 

Table 4-11. FCNFG Field Descriptions

 

 

 

Field

 

Description

 

 

7–6

Reserved, should be cleared.

 

 

5

Enable Security Key Writing

KEYACC

0

Writes to the flash block are interpreted as the start of a command write sequence.

 

1

Writes to the flash block are interpreted as keys to open the backdoor.

 

 

4–0

Reserved, should be cleared.

 

 

 

4.4.2.4Flash Protection Register (FPROT and NVPROT)

The FPROT register defines which flash sectors are protected against program or erase operations. FPROT bits are readable and writable as long as the size of the protected flash memory is being increased. Any write to FPROT that attempts to decrease the size of the protected flash memory is ignored.

During the reset sequence, the FPROT register is loaded from the flash protection byte in the flash configuration field (see Section 4.2.1), indicated by F in Table 4-6. To change the flash protection loaded during the reset sequence, the flash sector containing the flash configuration field must be unprotected. Then, the flash protection byte must be reprogrammed.

Trying to alter data in any protected area in the flash memory results in a protection violation error and FSTAT[FPVIOL] is set. The mass erase of the flash array is not possible if any of the flash sectors contained in the flash array are protected.

R

W

Reset

7

6

5

4

3

2

1

0

 

 

 

FPS

 

 

 

FPOPEN

 

 

 

 

 

 

 

 

F

F

F

F

F

F

F

F

 

 

 

 

 

 

 

 

 

 

Figure 4-6. Flash Protection Register (FPROT)

 

 

Table 4-12. FPROT Field Descriptions

 

 

 

Field

 

Description

 

 

7–1

Flash Protection Size. With FPOPEN set, the FPS bits determine the size of the protected flash address range

FPS

as shown in Table 4-13.

 

 

0

Flash Protection Open

FPOPEN

0

Flash array fully protected.

 

1

Flash array protected address range determined by FPS bits.

 

 

 

Table 4-13. Flash Protection Address Range

FPS

FPOPEN

Protected Address Range

Protected

Relative to Flash Array Base

Size

 

 

 

 

 

 

0

0x0_0000–0x1_FFFF

128 Kbytes

 

 

 

 

MCF51QE128 MCU Series Reference Manual, Rev. 3

74

Freescale Semiconductor

Get the latest version from freescale.com

Page 74
Image 74
Freescale Semiconductor MCF51QE128RM Flash Protection Register Fprot and Nvprot, Fcnfg Field Descriptions, FPS Fpopen