Freescale Semiconductor MCF51QE128RM manual SCI Data Register SCIxD, Baud Rate Generation

15.2.7SCI Data Register (SCIxD)

This register is actually two separate registers. Reads return the contents of the read-only receive data buffer and writes go to the write-only transmit data buffer. Reads and writes of this register are also involved in the automatic flag clearing mechanisms for the SCI status flags.

	7	6	5	4	3	2	1	0
R	R7	R6	R5	R4	R3	R2	R1	R0
W	T7	T6	T5	T4	T3	T2	T1	T0
Reset	0	0	0	0	0	0	0	0

Figure 15-12. SCI Data Register (SCIxD)

15.3Functional Description

The SCI allows full-duplex, asynchronous, NRZ serial communication among the MCU and remote devices, including other MCUs. The SCI comprises a baud rate generator, transmitter, and receiver block. The transmitter and receiver operate independently, although they use the same baud rate generator. During normal operation, the MCU monitors the status of the SCI, writes the data to be transmitted, and processes received data. The following describes each of the blocks of the SCI.

15.3.1Baud Rate Generation

As shown in Figure 15-13, the clock source for the SCI baud rate generator is the bus-rate clock.

MODULO DIVIDE BY (1 THROUGH 8191)

BUSCLK SBR12:SBR0

BAUD RATE GENERATOR

OFF IF [SBR12:SBR0] = 0

DIVIDE BY	Tx BAUD RATE
16

Rx SAMPLING CLOCK (16 ⋅ BAUD RATE)

BUSCLK

BAUD RATE = [SBR12:SBR0] ⋅ 16

Figure 15-13. SCI Baud Rate Generation

SCI communications require the transmitter and receiver (which typically derive baud rates from independent clock sources) to use the same baud rate. Allowed tolerance on this baud frequency depends on the details of how the receiver synchronizes to the leading edge of the start bit and how bit sampling is performed.

The MCU resynchronizes to bit boundaries on every high-to-low transition. In the worst case, there are no such transitions in the full 10- or 11-bit time character frame so any mismatch in baud rate is accumulated for the whole character time. For a Freescale Semiconductor SCI system whose bus frequency is driven by a crystal, the allowed baud rate mismatch is about ±4.5 percent for 8-bit data format and about ±4 percent for 9-bit data format. Although baud rate modulo divider settings do not always produce baud rates that exactly match standard rates, it is normally possible to get within a few percent, which is acceptable for reliable communications.

MCF51QE128 MCU Series Reference Manual, Rev. 3

Freescale Semiconductor 305

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