Freescale Semiconductor MCF51QE128RM manual ColdFire Memory Organization

Chapter 4 Memory

NOTE

Peripheral register locations for MCF51QE128/64/32 are shifted 0x(FF)FF_8000 compared with the MC9S08QE128/64/32 devices.

•The ColdFire interrupt controller module is mapped in the peripheral space and occupies a 64-byte space at the upper end of memory. Accordingly, its address decode is defined as 0x(FF)FF_FFC0–0x(FF)FF_FFFF. This 64-byte space includes the program-visible registers as well as the space used for interrupt acknowledge (IACK) cycles.

•There is a nonvolatile register area consisting of a 16-byte block locted in flash memory at 0x(00)00_0400–0x(00)00_040F. Nonvolatile register locations include:

—NVPROT and NVOPT are loaded into working registers at reset

—An 8-byte backdoor comparison key that optionally allows a user to gain controlled access to secure memory

Because the nonvolatile register locations are flash memory, they must be erased and programmed like other flash memory locations.

Table 4-2is a summary of all user-accessible direct-page registers and control bits.

The register names in column two in Table 4-2, Table 4-3, Table 4-6, and Table 4-7are shown in bold to set them apart from the bit names to the right. Cells not associated with named bits are shaded. A shaded cell with a 0 indicates this unused bit always reads as a 0. Shaded cells with dashes indicate unused or reserved bit locations that could read as 1s or 0s. When writing to these bits, write a 0 unless otherwise specified.

Recall that ColdFire uses a big-endian, byte-addressable memory architecture. The most significant byte of each address is the lowest numbered as shown in Figure 4-2. Multi-byte operands (16-bit words and 32-bit longwords) are referenced using an address pointing to the most significant (first) byte.

31	24	23		16	15	8	7	0
				Longword 0x(00)00_0000
	Word 0x(00)00_0000					Word 0x(00)00_0002
Byte 0x(00)00_0000			Byte 0x(00)00_0001		Byte 0x(00)00_0002			Byte 0x(00)00_0003
				Longword 0x(00)00_0004
	Word 0x(00)00_0004					Word 0x(00)00_0006
Byte 0x(00)00_0004			Byte 0x(00)00_0005		Byte 0x(00)00_0006			Byte 0x(00)00_0007

•

•

•

Longword 0x(FF)FF_FFFC

Word 0x(FF)FF_FFFC

Byte 0x(FF)FF_FFFC Byte 0x(FF)FF_FFFD

Word 0x(FF)FF_FFFE

Byte 0x(FF)FF_FFFE Byte 0x(FF)FF_FFFF

Figure 4-2. ColdFire Memory Organization

MCF51QE128 MCU Series Reference Manual, Rev. 3

Freescale Semiconductor 59

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