Freescale Semiconductor MCF51QE128RM manual Trigger Definition Register TDR, Szm

			Chapter 18 Version 1 ColdFire Debug (CF1_DEBUG)
		Table 18-13. AATR Field Descriptions (continued)
Field			Description
14–13	Size mask. Masks the corresponding SZ bit in address comparisons.
SZM
12–11	Transfer type mask. Masks the corresponding TT bit in address comparisons.
TTM
10–8	Transfer modifier mask. Masks the corresponding TM bit in address comparisons.
TMM
7			signal of the processor’s local bus.
	Read/write. R is compared with the R/W
R
6–5	Size. Compared to the processor’s local bus size signals.
SZ	00 Longword
	01 Byte
	10 Word
	11 Reserved
4–3	Transfer type. Compared with the local bus transfer type signals. These bits also define the TT encoding for
TT	BDM memory commands.
	00	Normal processor access
	Else	Reserved
2–0	Transfer modifier. Compared with the local bus transfer modifier signals, which give supplemental information
TM	for each transfer type. These bits also define the TM encoding for BDM memory commands (for backward
	compatibility).
	000	Reserved
	001	User-mode data access
	010	User-mode code access
	011	Reserved
	100	Reserved
	101	Supervisor-mode data access
	110	Supervisor-mode code access
	111	Reserved

18.3.7Trigger Definition Register (TDR)

TDR configures the operation of the hardware breakpoint logic that corresponds with the ABHR/ABLR/AATR, PBR/PBR1/PBR2/PBR3/PBMR, and DBR/DBMR registers within the debug module. TDR controls the actions taken under the defined conditions. Breakpoint logic may be configured as one- or two-level trigger. TDR[31–16] defines the second-level trigger, and TDR[15–0] defines the first-level trigger.

NOTE

The debug module has no hardware interlocks. To prevent spurious breakpoint triggers while the breakpoint registers are being loaded, disable TDR (clear TDR[L2EBL,L1EBL]) before defining triggers.

A write to TDR clears the CSR trigger status bits, CSR[BSTAT]. TDR is accessible in supervisor mode as debug control register 0x07 using the WDEBUG instruction and through the BDM port using the WRITE_DREG command.

MCF51QE128 MCU Series Reference Manual, Rev. 3

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