Freescale Semiconductor MCF51QE128RM APCTL3 Register Field Descriptions, ADPC21, ADPC20, ADPC16

		Analog-to-Digital Converter (S08ADC12V1)
		Table 11-12. APCTL3 Register Field Descriptions
Field		Description
7	ADC Pin Control 23. ADPC23 controls the pin associated with channel AD23.
ADPC23	0	AD23 pin I/O control enabled
	1	AD23 pin I/O control disabled
6	ADC Pin Control 22. ADPC22 controls the pin associated with channel AD22.
ADPC22	0	AD22 pin I/O control enabled
	1	AD22 pin I/O control disabled
5	ADC Pin Control 21. ADPC21 controls the pin associated with channel AD21.
ADPC21	0	AD21 pin I/O control enabled
	1	AD21 pin I/O control disabled
4	ADC Pin Control 20. ADPC20 controls the pin associated with channel AD20.
ADPC20	0	AD20 pin I/O control enabled
	1	AD20 pin I/O control disabled
3	ADC Pin Control 19. ADPC19 controls the pin associated with channel AD19.
ADPC19	0	AD19 pin I/O control enabled
	1	AD19 pin I/O control disabled
2	ADC Pin Control 18. ADPC18 controls the pin associated with channel AD18.
ADPC18	0	AD18 pin I/O control enabled
	1	AD18 pin I/O control disabled
1	ADC Pin Control 17. ADPC17 controls the pin associated with channel AD17.
ADPC17	0	AD17 pin I/O control enabled
	1	AD17 pin I/O control disabled
0	ADC Pin Control 16. ADPC16 controls the pin associated with channel AD16.
ADPC16	0	AD16 pin I/O control enabled
	1	AD16 pin I/O control disabled

11.4Functional Description

The ADC module is disabled during reset or when the ADCH bits are all high. The module is idle when a conversion has completed and another conversion has not been initiated. When idle, the module is in its lowest power state.

The ADC can perform an analog-to-digital conversion on any of the software selectable channels. In 12-bit and 10-bit mode, the selected channel voltage is converted by a successive approximation algorithm into a 12-bit digital result. In 8-bit mode, the selected channel voltage is converted by a successive approximation algorithm into a 9-bit digital result.

When the conversion is completed, the result is placed in the data registers (ADCRH and ADCRL). In

10-bit mode, the result is rounded to 10 bits and placed in the data registers (ADCRH and ADCRL). In

8-bit mode, the result is rounded to 8 bits and placed in ADCRL. The conversion complete flag (COCO) is then set and an interrupt is generated if the conversion complete interrupt has been enabled (AIEN = 1).

The ADC module has the capability of automatically comparing the result of a conversion with the contents of its compare registers. The compare function is enabled by setting the ACFE bit and operates with any of the conversion modes and configurations.

MCF51QE128 MCU Series Reference Manual, Rev. 3

Freescale Semiconductor 229

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