Freescale Semiconductor MCF51QE128RM manual Features, Freescale Semiconductor 335

Timer/PWM Module (S08TPMV3)

17.1.4Features

The TPM includes these distinctive features:

•One to eight channels:

—Each channel may be input capture, output compare, or edge-aligned PWM

—Rising-Edge, falling-edge, or any-edge input capture trigger

—Set, clear, or toggle output compare action

—Selectable polarity on PWM outputs

•Module may be configured for buffered, center-aligned pulse-width-modulation (CPWM) on all channels

•Timer clock source selectable as prescaled bus clock, fixed system clock, or an external clock pin

—Prescale taps for divide-by 1, 2, 4, 8, 16, 32, 64, or 128

—Fixed system clock source are synchronized to the bus clock by an on-chip synchronization circuit

—External clock pin may be shared with any timer channel pin or a separated input pin

•16-bit free-running or modulo up/down count operation

•Timer system enable

•One interrupt per channel plus terminal count interrupt

17.1.5Modes of Operation

In general, TPM channels may be independently configured to operate in input capture, output compare, or edge-aligned PWM modes. A control bit allows the whole TPM (all channels) to switch to center-aligned PWM mode. When center-aligned PWM mode is selected, input capture, output compare, and edge-aligned PWM functions are not available on any channels of this TPM module.

When the microcontroller is in active BDM background or BDM foreground mode, the TPM temporarily suspends all counting until the microcontroller returns to normal user operating mode. During stop mode, all system clocks, including the main oscillator, are stopped. Therefore, the TPM is effectively disabled until clocks resume. During wait mode, the TPM continues to operate normally. Provided the TPM does not need to produce a real time reference or provide the interrupt source(s) needed to wake the MCU from wait mode, you can save power by disabling TPM functions before entering wait mode.

•Input capture mode

When a selected edge event occurs on the associated MCU pin, the current value of the 16-bit timer counter is captured into the channel value register and an interrupt flag bit is set. Rising edges, falling edges, any edge, or no edge (disable channel) may be selected as the active edge that triggers the input capture.

•Output compare mode

When the value in the timer counter register matches the channel value register, an interrupt flag bit is set and a selected output action is forced on the associated MCU pin. The output compare action may be selected to force the pin to zero, force the pin to one, toggle the pin, or ignore the pin (used for software timing functions).

MCF51QE128 MCU Series Reference Manual, Rev. 3

Freescale Semiconductor 335

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