Freescale Semiconductor MCF51QE128RM manual Signal Description, Extclk

Timer/PWM Module (S08TPMV3)

The TPM channels are programmable independently as input capture, output compare, or edge-aligned PWM channels. Alternately, the TPM can be configured to produce CPWM outputs on all channels. When the TPM is configured for CPWMs, the counter operates as an up/down counter; input capture, output compare, and EPWM functions are not practical.

If a channel is configured as input capture, an internal pullup device may be enabled for that channel. The details of how a module interacts with pin controls depends upon the chip implementation because the I/O pins and associated general purpose I/O controls are not part of the module. Refer to the discussion of the I/O port logic in a full-chip specification.

Because center-aligned PWMs are usually used to drive 3-phase AC-induction motors and brushless DC motors, they are typically used in sets of three or six channels.

17.2Signal Description

Table 17-1shows the user-accessible signals for the TPM. The number of channels may be varied from one to eight. When an external clock is included, it can be shared with the same pin as any TPM channel; however, it could be connected to a separate input pin. Refer to the I/O pin descriptions in full-chip specification for the specific chip implementation.

	Table 17-1. Signal Properties
Name	Function
EXTCLK1	External clock source which may be selected to drive the TPM counter.
TPMxCHn2	I/O pin associated with TPM channel n

1When preset, this signal can share any channel pin. However, depending upon full-chip implementation, this signal could be connected to a separate external pin.

2n = channel number (1–8)

Refer to documentation for the full-chip for details about reset states, port connections, and whether there is any pullup device on these pins.

TPM channel pins can be associated with general purpose I/O pins and have passive pullup devices that can be enabled with a control bit when the TPM or general purpose I/O controls have configured the associated pin as an input. When no TPM function is enabled to use a corresponding pin, the pin reverts to being controlled by general purpose I/O controls, including the port-data and data-direction registers. Immediately after reset, no TPM functions are enabled, so all associated pins revert to general purpose I/O control.

17.2.1Detailed Signal Descriptions

This section describes each user-accessible pin signal in detail. Although Table 17-1grouped all channel pins together, any TPM pin can be shared with the external clock source signal. Because I/O pin logic is not part of the TPM, refer to full-chip documentation for a specific derivative for more details about the interaction of TPM pin functions and general purpose I/O controls including port data, data direction, and pullup controls.

MCF51QE128 MCU Series Reference Manual, Rev. 3

338 Freescale Semiconductor

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