Chapter 4 Memory

4.5.3.2Flash Protection Violations

The FPVIOL flag is set after the command is written to the FCMD register if any of the following illegal operations are attempted:

1.Writing the program command if the address written in the command write sequence was in a protected area of the flash array.

2.Writing the sector erase command if the address written in the command write sequence was in a protected area of the flash array.

3.Writing the mass erase command while any flash protection is enabled.

4.Writing an invalid command if the address written in the command write sequence was in a protected area of the flash array.

As a result of any of the above, the command write sequence immediately aborts. If FSTAT[FPVIOL] is set, clear the FPVIOL flag before starting another command write sequence (see Section 4.4.2.5, “Flash Status Register (FSTAT)”).

4.5.4Operating Modes

4.5.4.1Wait Mode

If a command is active (FCCF = 0) when the MCU enters wait mode, the active command and any buffered command is completed.

4.5.4.2Stop Modes

If a command is active (FCCF = 0) when the MCU enters any stop mode, the operation is aborted. If the operation is program or erase, the flash array data being programmed or erased may be corrupted and the FCCF and FACCERR flags are set. If active, the high voltage circuitry to the flash array is immediately switched off when entering stop mode. Upon exit from stop mode, the FCBEF flag is set and any buffered command is not launched. The FACCERR flag must be cleared before starting a command write sequence (see Section 4.5.1.2, “Command Write Sequence”).

NOTE

As active commands are immediately aborted when the MCU enters stop mode, do not use the STOP instruction during program or erase operations.

Active commands continue when the MCU enters wait mode. Use of the STOP instruction when SOPT1[WAITE] is set is acceptable.

4.5.4.3Background Debug Mode

In background debug mode, the FPROT register is writable without restrictions. If the MCU is unsecured, all flash commands listed in Table 4-16can be executed. If the MCU is secured, only a compound mass erase and erase verify command can be executed. See Chapter 18, “Version 1 ColdFire Debug (CF1_DEBUG),” for details.

MCF51QE128 MCU Series Reference Manual, Rev. 3

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Freescale Semiconductor MCF51QE128RM manual Operating Modes, Flash Protection Violations, Wait Mode, Stop Modes