Signal Description

R

2.6Voltage Reference and Power Signals

Signal Name

Type

Description

 

 

 

HVREF

Ref

Host Reference Voltage: Reference voltage input for the data, address,

 

 

and common clock signals of the host AGTL+ interface.

 

 

 

SDREF

Ref

SDRAM Reference Voltage: Reference voltage input for DQ, DQS,

 

 

RDCLKIN (SDR).

 

 

 

HI_REF

Ref

Hub Interface Reference: Reference voltage input for the hub interface.

 

 

 

AGPREF

Ref

AGP Reference: Reference voltage input for the AGP interface.

 

 

 

HLRCOMP

I/O

Compensation for Hub Interface: This signal is used to calibrate the

 

CMOS

hub interface I/O buffers. It is connected to a 40.2 pull-up resistor with

 

 

1% tolerance and is pulled up to VCC1_8.

 

 

 

GRCOMP

I/O

Compensation for AGP: This signal is used to calibrate buffers. It is

 

CMOS

connected to a 40.2 pull-down resistor with a 1% tolerance.

 

 

 

HRCOMP[1:0]

I/O

Compensation for Host: These signals are used to calibrate the host

 

CMOS

AGTL+ I/O buffers. Each signal is connected to a 24.9 pull-down

 

 

resistor with a 1% tolerance.

 

 

 

HSWNG[1:0]

I

Host Reference Voltage: Reference voltage input for the compensation

 

CMOS

logic.

 

 

 

SMRCOMP

I/O

System Memory RCOMP:

 

CMOS

 

 

 

 

VCC1_5

 

1.5 V Power Input: These pins are connected to a 1.5 V power source.

 

 

 

VCC1_8

 

1.8 V Power Input Pins: These pins are connected to a 1.8 V power

 

 

source.

 

 

 

VCCSM

 

SDRAM Power Input Pins: These pins are connected to a 3.3 V power

 

 

source for SDR.

 

 

 

VCCA[1:0]

 

PLL Power Input Pins: These pins provide power for the PLL.

 

 

 

VTT

 

AGTL+ Bus Termination Voltage Inputs: These pins provide the

 

 

AGTL+ bus termination.

 

 

 

VSS

 

Ground: The VSS pins are the ground pins for the MCH.

 

 

 

VSSA[1:0]

 

PLL Ground: The VSSA[1:0] pins are the ground pins for the PLL on

 

 

the MCH.

 

 

 

Intel® 82845 MCH for SDR Datasheet

29

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Intel 845 manual Voltage Reference and Power Signals, System Memory Rcomp