Register Description
R
3.5.31AMTT—AGP Interface Multi-Transaction Timer Register (Device 0)
Address Offset: | BCh |
Default Value: | 00h |
Access: | R/W |
Size: | 8 bits |
AMTT is an
The number of clocks programmed in the AMTT represents the guaranteed time slice (measured in 66 MHz clocks) allotted to the current agent (either AGP master or host bridge) after which the AGP arbiter will grant the bus to another agent. The default value of AMTT is 00h and disables this function. The AMTT value can be programmed with
Bit | Description |
|
|
7:3 | |
| represents the guaranteed time slice (measured in eight 66 MHz clock granularity) allotted to |
| the current agent (either AGP master or MCH) after which the AGP arbiter will grant the bus to |
| another agent. |
|
|
2:0 | Reserved. |
|
|
Intel® 82845 MCH for SDR Datasheet | 71 |