MPCBL0010
Table 75. | Telecom Clock Register 1 0A09h |
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Address |
| Action | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
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| Read | RSV1 | RSV0 | SELCLK3B | SELCLK3A | REFSEL | 8K_16M | SEL_REFFRQ | SEL_RDNCLK |
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0xA09 |
| Write | NU | NU | SELCLK3B | SELCLK3A | NU | 8K_16M | SEL_REFFRQ | SEL_RDNCLK |
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| Reset | X | X | 0 | 0 | X | 0 | 0 | 0 |
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SELCLK3B: Select the clock to send to the backplane CLK3B:
0:from the first AdvancedMC (AMC B1, CLKC)
1:from the second AdvancedMC (AMC B2, CLKC).
SELCLK3A: Select clock to send to backplane CLK3A:
0:from the first AdvancedMC (AMC B1, CLKC)
1:from the second AdvancedMC (AMC B2, CLKC).
8K_16M: This bit is valid only when the transmission clock is selected by setting TXREFx_SEL[2..0]=101 in TelClock3 register. Setting this bit selects the transmission clock frequency as 16.384 MHz, while clearing it select 8.0 kHz.
SEL_REFFRQ: Select reference frequency (8 k or 19.44 M): 0 = 8 kHz, 1=19.44 MHz. This bit controls the multiplexer that feeds clocks to the PLL:
0:PLL input clocks = CLK1A & CLK1B (8kHz per AdvancedTCA spec)
1:PLL input clocks = CLK2A & CLK2B (19.44MHz per AdvancedTCA spec)
SEL_RDNCLK: Setting this bit to the value of the formerly read REFSEL enables the
REFSEL: Show the reference that is currently selected:
0:Primary reference
1:Secondary reference
RSV1/ RSV0: Reserved.
Table 76. | Telecom Clock Register 2 0A0Ah |
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| Address | Action | D7 | D6 |
| D5 | D4 | D3 | D2 | D1 | D0 |
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| Read | PRI_LOS | SEC_LOS |
| HOLDOVER | UNLOCK | NU | DRVCLKA1 | NU | DRVCLKA0 |
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| 0xA0A | Write | NU | NU |
| NU | NU | NU | DRVCLKA1 | NU | DRVCLKA0 |
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| Reset | X | X |
| X | X | X | 0 | X | 0 |
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PRI_LOS: Loss of primary reference clock detected. This bit is high when the primary clock at the input of the PLL (i.e., after PLD mux) is lost.
SEC_LOS: Loss of secondary reference clock detected. This bit is high when the primary clock at the input of the PLL (i.e. after PLD mux) is lost.
HOLDOVER: Holdover detected by the PLL
UNLOCK: Unlock detected by the PLL
Intel NetStructure® MPCBL0010 Single Board Computer |
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Technical Product Specification | October 2006 |
100 | Order Number: 304120 |