Intel NetStructure® MPCBL0010 Single Board Computer
October 2006 Technical Product Specification
Order Number: 304120 65
BIOS Setup—MPCBL0010 SBC
Tabl e 29 shows the sub-menu options for configuring the CPU.
7.3.2 IDE Configuration Sub-Menu
To access this sub-menu, select Advanced on the menu bar, then IDE Configuration.
Remote Access Configuration
IPMI Configuration
USB Configuration
Main Advanced PCIPnP Boot Security Chipset Exit
Table 29. CPU Configuration Sub-Menu
Feature Options Description
Manufacturer Display CPU Manufacturer.
Brand String Display CPU Brand String.
Frequency Display CPU Frequency.
FSB Speed Displays Front Side Bus Speed.
Cache L1 Displays L1 Cache size.
Cache L2 Displays L2 Cache size.
Ratio Status Displays Ratio Status (14=2.8 Ghz).
Ratio Actual Value Displays Ratio Value.
Max CPUIP Value Limit Disabled
Enabled This should be enabled to boot legacy operating systems
that do not support extended CPUID functions.
Thermal Monitor Disabled
TM1
CPU Thermal Monitor. Modulates clock to compensate for
high temperature condition.
Note: Failures that occur due to Thermal Monitor
Disabled may void warranty.
Execute Disable Bit Disabled
Enabled When disabled, force XD feature flag to return 0.
Hardware Prefetcher Disabled
Enabled Enable/Disable Hardware Prefetcher.
Adjacent Cache Line
Prefetcher Disabled
Enabled Enable/Disable Adjacent Cache Line Prefetcher.
Hyper-Threading
Technology Disabled
Enabled Enable/Disable Hyper-Threading.
Note: Bold text indicates default setting.
Main Advanced PCIPnP Boot Security Chipset Exit
CPU Configuration
IDE Configuration
SuperIO Configuration
ACPI Configuration
System Management