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Intel Intel NetStructure Single Board Computer, MPCBL0010 manual Technical Product Specification

Models: Intel NetStructure Single Board Computer MPCBL0010

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Intel NetStructure® MPCBL0010 Single Board Computer

Technical Product Specification

October 2006

Order Number: 304120

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Intel Intel NetStructure Single Board Computer manual Intel NetStructure MPCBL0010 Single Board Computer

Contents

Intel NetStructure MPCBL0010 Single Board Computer Technical Product Specification Order Number Contents 1.1 Weight1.2 1.3 10.8.1 Reset Bios Flash Type 10.8 OEM Ipmi CommandsPwrBtn usage Hardware Management Overview 131 10.8.210.8.2.1 132 177 Component Technology 179 Warranty Information 180 16.1178 20.5 Chinese Safety Warning Safety WarningsAdvancedMC Direct Connect Switch Block Diagram Warm Reset Block Diagram Tables Supported Memory Configurations Jumper Definitions 101 100102 103 Hot Swap LED Signals 136 Reset Bios Flash Type 131Reset Actions 140 SOL Configuration Reference Script Command-line Options 151 Date Revision Description Revision History Document Organization Introduction Glossary Intelligent Platform Management Bus. Physical two-wire That allows your networked client computer to boot using aSee the Low Pin Count LPC Interface specification Phase-locked Loop Application Feature OverviewFunctional Description Chipset Low Voltage Intel Xeon Processor Memory Controller Hub Memory J10, J122.2 I/O Controller Hub 2.3 64-Bit PCI Hub Supported Memory Configurations Timers4 I/O 4.1 I/O Controller Hub Gigabit Ethernet AdvancedMC AMC Connector J18, J194.5 10/100 Fast Ethernet 4.6 USB Firmware Hubs 6.1 FWH0 Main Bios 6.2 FWH1 Backup/Recovery Bios Onboard Power SuppliesFlash ROM Backup Mechanism Power Feed Fuses Telecom Clock Ipmc AdvancedMC Direct Connect AdvancedTCA Compliance AdvancedMCA Direct Connect Switch Block Diagram Jumpers Operating the Unit MPCBL0010 SBC Name Function with Jumper Present On Removed Off AdvancedMC Filler Panel AdvancedMC Filler Panels Remove the cover Installing Memory Insert two matched pair DIMMs Installing and Extracting the SBC Chassis Extraction Chassis Installation Solid blue Bios Configuration AdvancedMC Module Installation and ExtractionRemote Access Configuration Software Updates Loading\Saving Custom Bios Configuration Bios UpdatesBios Image Command Behavior Saving BIOS.bin to the SBC Copying BIOS.bin from the SBC Flashlnx Command Line Options Ipmc Firmware UpdatesIpmc Firmware Upgrade Using the KCS Interface Flashlnx Utility Command Line Options Digital Ground to Chassis Ground Connectivity Digital Ground and Chassis Ground Isolated Default Mechanical Specifications SpecificationsEnvironmental Specifications Board Outline Mean Time Between Failure Mtbf Specifications Reliability SpecificationsEnvironmental Assumptions General Assumptions Power Requirements WeightPower Consumption General Notes Connectors and LEDs Backplane Description Connectors Connectors and LEDs-MPCBL0010 SBC Front Panel Description Connectors Front Panel Front Panel Connector Assignments Power Distribution Connector P10 Backplane Connectors Power Distribution Connector Zone 1 P10 Pin Assignments AdvancedTCA Data Transport Connector J23Pin Signal Description Data Transport Connector Zone 2 J23 AdvancedTCA* Data Transport Connector Zone 2 J20 Pin AdvancedTCA Data Transport Connector J20Alignment Blocks Pin Post Code Connector J13 On-Board ConnectorsExtended IPT700 Debug Port Connector J25 Post Code Connector Pin Assignments Ethernet 10/100 Debug Connector J3 Front Panel ConnectorsEthernet 10/100 Debug Connector LED Operation Function Serial Port Connector J5 USB Connector J4 Serial Port Connector J5 Pin Assignments AdvancedMC* Connectors J18, J19 AdvancedMC* Connector Pin Assignments LEDs AdvancedMC* Connector OOS OOS Front Panel LED Descriptions Sheet 1 Front Panel LED Descriptions Sheet 2 Post LED Codes Example Post LED Codes Reset Button Bios Flash Memory Organization Bios FeaturesRedundant Bios Functionality Introduction Boot Options Recovering Bios DataLegacy USB Support Language Support Bios Security Features Fast Booting SystemsCD-ROM and Network Boot Booting without Attached Devices Function Key Escape Code Equivalents Sheet 1 Supervisor and User Password FunctionsKey Escape Sequence ESC OP ESC OQ ESC or ESC OS ESC OW ESC OX Function Key Escape Code Equivalents Sheet 2ESC OY ESC OZ Bios Setup Program Menu Bar Bios SetupBios Setup Program Function Keys Main Menu Bios ID Feature Options DescriptionAdvanced Menu Main Menu Advanced Menu CPU Configuration Sub-MenuPicmg Shows the sub-menu options for configuring the CPU IDE Configuration Sub-MenuCPU Configuration Sub-Menu IDE Configuration Sub-Menu Shows the IDE configuration options Shows the IDE Master/Slave configuration options Primary IDE Master/Slave Configuration OptionsIDE Master/Slave Sub-Menu Shows SuperIO configuration options SuperIO Configuration Sub-Menu SuperIO Configuration Sub-Menu Acpi Configuration Sub-Menu Chipset Acpi Configuration Sub-Menu Advanced Acpi Configuration Sub-MenuShows Acpi configuration options Acpi Configuration Sub-Menu System Management Sub-Menu Chipset Acpi Configuration Sub-MenuShows the System Management information Apic Acpi SCI IRQ Shows event log configuration options Event Log Configuration Sub-MenuSystem Management Sub-Menu Event Log Configuration Sub-Menu PCI Express Error Masking Configuration Sub-MenuPCI Express Error Masking Configuration Sub-Menu Shows MPS Configuration options MPS Configuration Sub-MenuMPS Configuration Sub-Menu AdvancedTCA* Channel Routing PICMG* Sub-Menu AdvancedTCA Channel Routing Picmg Sub-Menu On-board Devices Configuration Sub-Menu Shows On-board Devices Configuration options PCI Express* Configuration Sub-MenuOn-board Devices Configuration Sub-Menu Option ROM Configuration Options Shows PCI Express configuration options Remote Access Configuration Sub-MenuPCI Express* Configuration Sub-Menu Shows remote access configuration options Ipmi Configuration Sub-MenuRemote Access Configuration Sub-Menu Ipmi Configuration Sub-Menu Shows the Ipmi configuration optionsShows the LAN configuration options LAN Configuration Sub-Menu Shows USB configuration options USB Configuration Sub-MenuUSB Configuration Sub-Menu USB Mass Storage Device Configuration USB Mass Storage Device ConfigurationPCIPnP Menu PCIPnP Menu Boot Settings Configuration Sub-Menu Boot MenuBoot Menu Shows Boot Settings Configuration options Boot Settings Configuration Sub-Menu Sheet 2 Boot Device Priority Sub-MenuShows Boot Device Priority options Boot Device Priority Sub-Menu Shows OS Load Timeout Timer options OS Load Timeout Timer Sub-MenuHard Disk Drives Sub-menu Shows Hard Disk Drives options Shows passwords and security features OS Load Timeout Timer Sub-MenuSecurity Menu Chipset Menu Describes the sub-menus used to select chipset features Northbridge Configuration Sub-MenuNorthbridge Chipset Configuration Chipset Menu Spread Spectrum Clocking Mode Configuration Spread Spectrum Clocking Mode Sub-MenuExit Menu Exit Menu Exit Menu Bios Error Messages Error MessagesBios Error Messages Cmos Checksum BAD Clear Cmos Jumper enabled Post Code Checkpoints Bootblock Initialization Code CheckpointsCheckpoint Description Smram Early CPU Init Exit Acpi Runtime Checkpoints DIM Code Checkpoints PCI Configuration Map PCI Configuration MapAddressing Lists the PCI devices and the bus on which they reside AMC B2 AMC B1 Fpga Registers Symbol DescriptionFpga Register Legend Post Codes 0080h Fpga Register OverviewExtended Post Codes 0081h Version Programmable logic version Fpga Version 0A00hDebug LED 0A01h Address Action Fwum 0A02h Development Features 0A04hFwum Ready Fwum Busy PCB PCB version Hwmode Holos MS2 MS1 Refalign FCS E3DS3 Telecom Clock Register 0 0A08h Telecom Clock Register 2 0A0Ah Telecom Clock Register 1 0A09h Transmission Frequency Selection Telecom Clock Register 3 0A0BhTelecom Clock Register 4 0A0Ch TXREFxSEL2..0 Transmission Clock Frequency Telecom Clock Register 6 0A0Eh 0xA0D Write ResetUnlock Hldovr SEC10 SEC01 PRI10 PRI01 Telecom Clock Register 7 0A0Fh Ipmc AddressesIpmc Register Legend Address Function Ltype Ltest Uart Brst SBC Control 00hHT0 PwrBtn usage Post Code Low 02h SBC Status 01hPost Code High 03h LED Color Control 06h AdvancedMC B1 Control & Status 11h AdvancedMC B1 Control & Status 10h AdvancedMC B2 Control & Status 13h AMC B2 Control & Status 12h ADC Grab Control 20h CPU 0 VIDs 18hVID5 VID4 VID3 VID2 VID1 VID0 Mcerr HOT Trip VTT Ierr Fabric Control 1 24h ADC1 and ADC2 Grab Data 21-22hPCB 3VOC Default configuration connects FWH0 and FWH1 to the ICH Reset Source 27hReset Events 29h Fabric Control 2 25h Crosspoint Switch Control 2Ah Crosspoint Switch Data 2Bh Crosspoint Switch Ports RegisterMiscellaneous Controls and Status 2Dh Ipmc Post Codes FEh Version FFh Address Action FFh Read Reserved Version Write PowerUp Intelligent Platform Management Controller Ipmc Hardware Management Overview Ipmc Block Diagram Hardware Sensors Sheet 1 Sensor Data Record SDRGreen to Red State M1 Hardware Sensors Sheet 2 Hardware Sensors Sheet 3 OEM Sensor Types Hardware Sensors Sheet 4OEM Name OEM Number Description OEM Event/Reading Type System Event Log SELSEL Events Supported Sheet 1 Sensor Sensor Type Specific Event Description Code PCI Serr SEL Events Supported Sheet 2PCI Perr SO/GO SEL Events Supported Sheet 3 SEL Events Supported Sheet 4 When name is FIA FRU Initialization Sensor Sensor Type Specific Event Description Code Offset SEL Events Supported Sheet 5OEM Field Replaceable Unit FRU Information Ipmb Link SensorVariable Size Data Type Bytes ASC-II LinuxCustFru Utility Usage Customizable FRU AreaFRU Customer Area Seecommon Example 1. Input File AB AC AD AE AF Keying OEM Ipmi Commands Reset Bios Flash Type Reset Bios Flash TypeBoard Device Channel Port Selection Identifiers Channel Port Selection Identifiers SetBoardDeviceChannelPortSelection SetBoardDeviceChannelPortSelectionResponse GetBoardDevicePossibleSelection GetBoardDeviceChannelPortSelectionGetBoardDeviceChannelPortSelection GetBoardDevicePossibleSelection Get Control State Set Control StateControls Identifier Table Set Control State Controls Identifier Hot Swap ProcessControl Description Control Number FWH AdvancedMC Module Activation Hot Swap LED SignalsHot Swap LED LED Status Meaning Pre-Defined Resources for AdvancedMC Modules Temperature and Voltage Sensors Sensors and Thresholds Version SDR System Acpi Power State System Firmware Progress Post ErrorProcessor Events Dimm Memory Events Reset Actions ResetReset Action System Function Memory Status Ipmb Link Sensor Hard Reset Warm Reset Ipmc Firmware Code Ipmc Firmware Code Process MPCBL0010 SBC-Hardware Management Overview References Serial Over LAN SOLSOL Architecture SOL Implementation SOL Block Diagram Architectural Components Theory of OperationFront Panel Serial Port or Rear Transition Module Serial Over LAN Serial Over LAN Client Reference Configuration Script Supported Usage Model Configuring the Blade for SOL Default Behavior SOL Configuration Reference Script referencecfgReference Script referencecfg SOL User Information SOL Configuration Reference Script Command-line Options Command Line OptionsSOL Parameters Channel Parameters Target Blade Setup Setting up a Serial Over LAN SessionBios Configuration Change the serial parameter to read Operating System Configuration For Rhel Change the kernel line to read Execute the referencecfg Script Sbcutils RPM Installation Script executed on the Intel CMM Execute this command to configure SOL on the target blade Configure the Ethernet Port Client Blade SetupExecute this command to restart the network For RedHat* Rhel Configure IP address of the Ethernet port Checking SOL Configuration Installing ipmitoolStart an SOL Session OEM Ending an SOL Session Operating Systems for SOL Client ipmitool Telecom Clock Block Diagram of the Telecom Clock Function Description Interface Description Configuration Recovered Clock SelectionAlarm Handling Operational Configuration Telecom Clock API Enable/Disable Transmission ClockModule Transmission Frequency Selection Name Used For Value Automatic Switchover Recovered ClockAutomatic Switchover Mode Automatic Switchover Values Reference Frequency for PLL Select Reference ClockPrimary/Secondary Redundant Clock Hardware Reset PLL Operating ModeCorner Frequency Reference Clock Alignment Hardware Reset Values Read Alarm StatesAlarm State Values Read New Events Sysfs Interface Read the Current Reference ClockReference Clock Values Telecom Clock API Function Mapping for the sysfs Interface 80h Telecom Clock RegistersA10-A1Fh October Technical Product Specification Order Number 171 DRVCLKB1 DRVCLKA1 DRVCLKB0 DRVCLKA0 Addres Action UNLOCK10 UNLOCK01 HLDOVR10 HLDOVR01 SEC10 SEC01 PRI10 PRI01 October Technical Product Specification Order Number 175 Bit Write Read FPGA/PLD Serial Link Bit Definition Diagnostics MaintenanceSupervision In-Target Probe ITP Thermals Power vs. Flow Rate Component Technology Returning a Defective Product RMA Warranty InformationFor the Americas For Asia and Pacific Apac For Europe, Middle East, and Africa EmeaLimitation of Liability and Remedies MPCBL0010 SBC-Warranty Information Customer Support Technical Support and Return for Service AssistanceCustomer Support Sales Assistance Vcci Cisprzz Certifications North America FCC Class B Agency Information-Class BJapan Vcci Class B Korean Class B Australia, New Zealand Safety Warnings Mesures de Sécurité Sicherheitshinweise Norme di Sicurezza Instrucciones de Seguridad Chinese Safety Warning Appendix a Reference Documents MPCBL0010 SBC-Reference Documents Ipmi 1.5 Supported Commands Sheet 1 Appendix B List of Supported Commands Ipmi v1.5 and Picmg FRU Device Commands NetFn Ipmi 1.5 Supported Commands Sheet 2 Command NetFn Interface Picmg 3.0 Ipmi Supported Commands