Intel NetStructure® MPCBL0010 Single Board Computer
October 2006 Technical Product Specification
Order Number: 304120 95
Addressing—MPCBL0010 SBC
9.2 FPGA Registers

This section describes the Field Programmable Gate Array (FPGA) register settings.

Note: Unused bits are reserved. To ensure compatibility with other products and upgrades to

this product, do not modify unused bits.

# lspci -t
-[00]-+-00.0
+-00.1
+-02.0-[02-04]--+-00.0-[04]--
| \-00.2-[03]--+-01.0 (i82546GB, base ch 1)
| +-01.1 (i82546GB, base ch 2)
| +-02.0 (i82546GB, fabric port 0)
| \-02.1 (i82546GB, fabric port 1)
+-04.0-[0f-17]-- (AMC B2)
+-06.0-[06-0e]-- (AMC B1)
+-1c.0-[05]--
+-1d.0
+-1d.1
+-1d.4
+-1d.5
+-1d.7
+-1e.0-[01]----01.0 (i82551 Debug LAN)
+-1f.0
+-1f.1
\-1f.3

Table 66. FPGA Register Legend

Symbol Description
U Unchanged (stays unchanged after reset)
X Not Defined
NU Not Used