Intel MPCBL0010, Intel NetStructure Single Board Computer manual Early CPU Init Exit

Error Messages—MPCBL0010 SBC

Table 62.	POST Code Checkpoints (Continued)
	Checkpoint	Description
	C7	Early CPU Init Exit.
	0A	Initializes the 8042-compatible Keyboard Controller.
	0B	Detects the presence of PS/2 mouse.
	0C	Detects the presence of Keyboard in KBC port.
		Testing and initialization of different Input Devices. Also, update the Kernel Variables. Traps
	0E	the INT09h vector, so that the POST INT09h handler gets control for IRQ1. Uncompress all
		available language, BIOS logo, and Silent logo modules.
	13	Early POST initialization of chipset registers.
	24	Uncompress and initialize any platform specific BIOS modules.
	30	Initialize System Management Interrupt.
	2A	Initializes different devices through DIM.
	2C	Initializes different devices. Detects and initializes the video adapter installed in the system
		that have optional ROMs.
	2E	Initializes all the output devices.
	31	Allocate memory for ADM module and uncompress it. Give control to ADM module for
		initialization. Initialize language and font modules for ADM. Activate ADM module.
	33	Initializes the silent boot module. Set the window for displaying text information.
	37	Displaying sign-on message, CPU information, setup key message, and any OEM-specific
		information.
	38	Initializes different devices through DIM.
	39	Initializes DMAC-1 & DMAC-2.
	3A	Initialize RTC date/time.
	3B	Test for total memory installed in the system. Also, check for DEL or ESC keys to limit memory
		test. Display total memory in the system.
	3C	Mid POST initialization of chipset registers.
	40	Detect different devices (Parallel ports, serial ports, and coprocessor in CPU, etc.) successfully
		installed in the system and update the BDA, EBDA, etc.
	50	Programming the memory hole or any kind of implementation that needs an adjustment in
		system RAM size if needed.
	52	Updates CMOS memory size from memory found in memory test. Allocates memory for
		Extended BIOS Data Area from base memory.
	60	Initializes NUM-LOCK status and programs the KBD typematic rate.
	75	Initialize Int-13 and prepare for IPL detection.
	78	Initializes IPL devices controlled by BIOS and option ROMs.
	7A	Initializes remaining option ROMs.
	7C	Generate and write contents of ESCD in NVRam.
	84	Log errors encountered during POST.
	85	Display errors to the user and gets the user response for error.
	87	Execute BIOS setup if needed.
	8C	Late POST initialization of chipset registers.
	8D	Build ACPI tables (if ACPI is supported).
	8E	Program the peripheral parameters. Enable/Disable NMI as selected.
	90	Late POST initialization of system management interrupt.
	A0	Check boot password if installed.

	Intel NetStructure® MPCBL0010 Single Board Computer
October 2006	Technical Product Specification
Order Number: 304120	91