
MPCBL0010 SBC—Operating  the Unit
Figure 4. Jumper/Connector Locations
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| Table 2. | Jumper Definitions | 
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 | Name | Function with Jumper | Function with Jumper | 
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 | Present (On) | Removed (Off) | |
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 | JP3 VT100 Mode | Enabled (default) | Disabled | 
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 | JP5 Clear CMOS | Clear CMOS | Normal operation (default) | 
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 | SBC Activation Override. | 
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 | JP6 IPMC Override for | This setting is used when there is not | Require AdvancedTCA shelf manager | 
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 | MPCBL0010 SBC | an AdvancedTCA shelf manager to | |
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 | (posts  | activate the MPCBL0010 SBC. Setting | to activate MPCBL0010 SBC (default). | 
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 | this jumper allows the SBC to power | 
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 | up without a shelf manager. | 
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 | AdvancedMC Activation Override. | 
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 | This setting is used when there is not | Require AdvancedTCA shelf manager | 
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 | JP6 IPMC Override for | an AdvancedTCA shelf manager | |
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 | AdvancedMC | capable of activating the AdvancedMC | to activate AdvancedMC modules | 
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 | (posts  | modules installed in the MPCBL0010 | installed in the MPCBL0010 SBC | 
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 | SBC. Setting this jumper allows the | (default). | |
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 | AdvancedMCs to power up without | 
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 | shelf manager support. | 
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 | JP7 POST code | POST code to IPMC | POST code to BIOS (default) | 
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| Intel NetStructure® MPCBL0010 Single Board Computer | 
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| Technical Product Specification | 
 | October 2006 | |
| 26 | 
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 | Order Number: 304120 | 
