Intel MPCBL0010, Intel NetStructure Single Board Computer manual AdvancedMC Direct Connect

Feature Overview—MPCBL0010 SBC

Control and status registers are implemented in the FPGA. States are synchronized between the FPGA and the PLD through a 33MHz full-duplex synchronous serial link. The FPGA being attached to the main processor as well as the IPMC allows for flexibility, and accesses to the control/status registers are simple and fast.

The PLL and clock buffers are not powered in the suspend well and stop working when the SBC is powered down.

The following frequencies can be selected individually for an AdvancedMC module:

•8 kHz

•1.544 MHz

•2.048 MHz

•4.096 MHz

•6.312 MHz

•8.192 MHz

•8.592 MHz

•11.184 MHz

•19.44 MHz

•34.368 MHz

•44.735 MHz

For more information on the telecom clock, see Section 12.0, “Telecom Clock”.

2.2.10AdvancedMC Direct Connect

The AdvancedMC Direct Connect feature on the MPCBL0010 SBC enables connections from the AdvancedMC module directly to the AdvancedTCA backplane zone 2 fabric interface through a cross-point switch. This connection can be used instead of the on- board gigabit Ethernet connection that is normally routed to the AdvancedTCA fabric interface. Figure 2 displays the possible connection paths. Each intersecting dot in the diagram represents a programmable switch setting that can be set using IPMI OEM commands or through the BIOS configuration. This feature is compatible with the AdvancedMC .2 R1.0 specification.

	Intel NetStructure® MPCBL0010 Single Board Computer
October 2006	Technical Product Specification
Order Number: 304120	23