Intel 80287, 80286 manual IMUL-Signed Multiply, Opcode Instruction Clocks Description Imul eb

THE 80286 INSTRUCTION SET

IMUL-Signed Multiply

Opcode			Instruction	Clocks	Description
F6	15		IMUL eb	13,mem=~6	Signed multiply (AX =	AL X EA byte)
F7	15		IMUL ew	21,mem=24	Signed multiply (DXAX = AX X EA word)
68	Ir	db	IMUL rw,db	21,mem=24	Signed multiply imm. byte into word reg.
69	Ir	dw	IMUL rw,ew,dw	21,mem=24	Signed multiply (rw =	EA word X imm. word)
68	Ir	db	IMUL rw,ew,db	21,mem=24	Signed multiply (rw =	EA word X imm. byte)

FLAGS MODIFIED

Overflow, carry

FLAGS UNDEFINED

Sign, zero, auxiliary carry, parity

OPERATION

IMUL performs signed multiplication. If IMUL has a single byte source operand, then the source is multiplied by AL and the 16-bit signed result is left in AX. Carry and overflow are set to 0 if AH is a sign extension of AL; they are set to 1 otherwise.

If IMUL has a single word source operand, then the source operand is multiplied. by AX and the 32-bit signed result is left in DX:AX. DX contains the high-order 16 bits of the product. Carry and overflow are set to 0 if DX is a sign extension of AX; they are set to 1 otherwise.

If IMUL has three operands, then the second operand (an effective address word) is multiplied by the third operand (an immediate word), and the 16 bits of the result are placed in the first operand (a word register). Carry and overflow are set to 0 if the result fits in a signed word (between - 32768 and +32767, inclusive); they are set to 1 otherwise.

NOTE

The low 16 bits of the product of a 16-bit signed multiply are the same as those of an unsigned mUltiply. The three operand IMUL instruction can be used for unsigned operands as well.

PROTECTED MODE EXCEPTIONS

#GP(O) for an illegal memory operand effective address in the CS, DS, or ES segments; #SS(O) for an

~11~ __ 1 __ .l..J __ ~~!_ "-1.. ..... C'C'.... """'"........ "" ..... +

11111;:;5a1 a.UUl \.<,:),:) ~11 LU...... UIJ ., ..... OJ.J.J. ..... u. ...

REAL ADDRESS MODE EXCEPTIONS

Interrupt 13 for a word operand at offset OFFFFH.

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