Intel 80286, 80287 manual Register and Immediate Modes, Memory Addressing Modes

80286 BASE ARCHITECTURE

One-operand instructions, such as INC or DEC. The location of the single operand can be speci- fied implicitly, as in AAM (where the register AX contains the operand), or explicitly, as in INC (where the operand can be in any register or memory location). Explicitly specified operands are accessed via one of the addressing modes described in section 2.4.2.

Two operand instructions such as MOV, ADD, XOR, etc., generally overwrite one of the two participating operands with the result. A distinction can thus be made between the source operand (the one left unaffected by the operation) and the destination operand (the one overwritten by the result). Like one-operand instructions, two-operand instructions can specify the location of operands either explicitly or implicitly. If an instruction contains two explicitly specified operands, only one of them-either the source or the destination-can be in a register or memory location. The other operand must be in a register or be an immediate source operand. Special cases of two-operand instructions are the string instructions and stack manipulation. Both operands of some string instructions are in memory and are explicitly specified. Push and pop stack operations allow trans- fer between memory operands and the memory based stack.

Thus, the two-operand instructions of the 80286 permit operations of the following sort:

Register-to-register

Register-to-memory

Memory-to-register

Immediate-to-register

Immediate-to-memory

Memory-to-memory

Instructions can specify the location of their operands by means of eight addressing modes, which are described in sections 2.4.2 and 2.4.3.

2.4.2 Register and Immediate Modes

Two addressing modes are used to reference operands contained in registers and instr.uctions:

Register Operand Mode. The operand is located in one of the 16-bit registers (AX, BX, CX, DX, sr, DI, SP, or BP) or in one of the 8-bit general registers (AR, BR, CR, DR, AL, BL, CL, or DL).

Special instructions are also included for referencing the CS, DS, ES, SS, and Flag registers as operands also.

Immediate Operand Mode. The operand is part of the instruction itself (the immediate operand element).

2.4.3 Memory Addressing Modes

Six modes are used to access operands in memory. Memory operands are accessed by means of a pointer consisting of a segment selector (see section 2.3.2) and an offset, which specifies the operand's displacement in bytes from the beginning of the segment in which it resides. Both the segment selector component and the offset component are 16-bit values. (See section 2.1 for a discussion of segmenta- tion.) Only some instructions use a full 32-bit address.

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