Intel 80287, 80286 manual Addressing Modes, Operands

80286 BASE ARCHITECTURE

The DF flag, like the IF flag, is controlled by instructions (CLD = clear, STD = set) or flag register modification through the stack. Typically, routines that use string instructions will save the flags on the stack, modify DF as necessary via the instructions provided, and restore DF to its original state by restoring the Flag register from the stack before returning. Access or control of the DF flag is not inhibited by the protection mechanism in Protected Mode.

The Special Fields bits are only relevant in Protected Mode. Real Address Mode programs should treat these bits as don't-care's, making no assumption about their status. Attempts to modify the 10PL and NT fields are subject to protection checking in Protected Mode. In general, the application's program- mer will not be able to and should not attempt to modify these bits. (See section 10.3, "Privileged and Trusted Instructions" for more details.)

2.4 ADDRESSING MODES

The information encoded in an 80286 instruction includes a specification of the operation to be performed, the type of the operands to be manipulated, and the location of these operands. If an operand is located in memory, the instruction must also select, explicitly or implicitly, which of the currently addressable segments contains the operand. This section covers the operand addressing mechanisms; 80286 operators are discussed in Chapter 3.

The five elements of a general in~truction are briefly described below. The exact format of 80286 instructions is specified in Appendix B.

The opcode is present in all instructions; in fact, it is the only required element. Its principal function is the specification of the operation performed by the instruction.

A register specifier.

The addressing mode specifier, when present, is used to specify the addressing mode of an operand for referencing data or performing indirect calls or jumps.

The displacement, when present, is used to compute the effective address of an operand in memory.

The immediate operand, when present, directly specifies one operand of the instruction.

Of the four elements, only one, the opcode, is always present. The other elements mayor may not be present, depending on the particular operation involved and on the location and type of the operands.

2.4.1 Operands

Generally speaking, an instruction is an operation performed on zero, one, or two operands, which are the data manipulated by the instruction. An operand can be located either in a register (AX, BX, ex, ox, SI, DI, SP, or BP in the case of 16-bii operands; AR, AL, BR, BL, CR, CL, DIl, or DL in the case of 8-bit operands; the FLAG register for flag operations in the instruction itself (as an immediate operand», or in memory or an I/O port. Immediate operands and operands in registers can be accessed more rapidly than operands in memory since memory operands must be fetched from memory while immediate and register operands are available in the processor.

An 80286 instruction can reference zero, one, or two operands. The three forms are as follows:

Zero-operand instructions, such as RET, NOP, and HLT. Consult Appendix B.

2-16