Intel 80286, 80287 manual LGDTILIDT-Load Global/Interrupt Descriptor Table Register, Lgdt, LlDT

THE 80286 INSTRUCTION SET

LGDTILIDT-Load Global/Interrupt

Descriptor Table Register

Opcode			Instruction		Clocks	Description
OF	01	/2	LGDT	m	11	Load m into Global Descriptor Table reg
OF	01	/3	LlDT	m	12	Load m into Interrupt Descriptor Table reg

FLAGS MODIFIED

None

FLAGS UNDEFINED

None

OPERATION

The Global or the Interrupt Descriptor Table Register is loaded from the six bytes of memory pointed to by the effective address operand (see figure 10.3). The LIMIT field of the descriptor table register loads from the first word; the next three bytes go to the BASE field of the register; the last byte is ignored.

LGDT and LIDT appear in operating systems software; they are not used in application programs. These are the only instructions that directly load a physical memory address in 80286 protected mode.

PROTECTED MODE EXCEPTIONS

#GP(O) if the current privilege level is not O.

#UD if source operand is a register.

#GP(O) for an illegal memory operand effective address in the CS, DS, or ES segments; #SS(O) for an illegal address in the SS segment.

REAL ADDRESS MODE EXCEPTIONS

These instructions are valid in Real Address mode to allow the power-up initialization for Protected mode.

Interrupt 13 for a word operand at offset OFFFFH. #UD if source operand is a register.

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