Intel 80286, 80287 manual Architecture, Processor Extension Data Channel

CHAPTER 3

SYSTEM-LEVEL NUMERIC PROGRAMMING

System programming for 80287 systems requires a more detailed understanding of the 80287 NPX than does application programming. Such things as emulation, initialization, exception handling, and datil and error synchronization are all the responsibility of the systems programmer. These topics are covered in detail in the sections that follow.

80287 ARCHITECTURE ./

On a software level, the 80287 NPX appears as an extension of the 80286 CPU. On the hardware level, however, the mechanisms by which the 80286 and 80287 interact are a bit more complex. This section describes how the 80287 NPX and 80286 CPU interact and points out features of this inter- action that are of interest tdsystems programmers.

Processor Extension Data Channel

All transfers of operands between the 80287 and system memory are performed by the 80286's internal Processor Extension Data Channel. This independent, DMA-like data channel permits all operand transfers of the 80287 to come under the supervision of the 80286 memory-management and protection mechanisms. The operation of this data channel is completely transparent to software.

Because the 80286 actually performs all transfers between the 80287 and memory, no additional bus drivers, controllers, or other components are necessary to interface the 80287'NPX to the local bus. Any memory accessible to the 80286 CPU is accessible by the 80287. The Processor Extension Data Channel is described in more detail in Chapter Six of the 80286 Hardware Reference Manual.

Real-Address Mode and Protected Virtual-Address Mode

Like the 80286 CPU, the 80287 NPX can operate in both Real-Address mode and in Protected mode. Following a hardware RESET, the 80287 is initially activated in Real-Address mode. A single, privi-

leged instruction (FSETPM) is necessary to set the 80287 into Protected mode. .

As an extension to the 80286 CPU, the 80287 can access any memory location accessible by the task currently executing on the 80286. When operating in Protected mode, aU memory references by the 80287 are automatically verified by the 80286's memory management and protection mechanisms as for any other memory references by the currently-executing task. Protection violations associated with NPX instrilctionsautomatically cause the 80286 to trap to an appropriate exception handler.

To the programmer, these two 80287 operating modes differ only in the manner in which the NPX instruction and datapointets ate represented in memory following an FSAVE or FSTENV instruction. When the 80287 operates in Protected mode, its NPX instruction and data pointers are each repre- sented in memory as a 16-bit segment selector and a 16-bit offset. When the 80287 operates in Real- Add' .:ss mode, these same instruction and data pointers are represented. simply as the 20-bit physical ad" ;'esses of the operands in question (see figure 1-7 in Chapter One).

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