INDEX

Single Step (Interrupt 1),

(see Interrupt Priorities)

SMSW Instruction, 10-4, B-I03

SP Register, 2-7 - 2-14,2-19,

3-24 - 3-26, 4-2, 7-20, 7-21, 10-7

SSRegister, 2-7, 2-8, 2-10 - 2-14, 2-17 - 2-19, 5-7,6-9 - 6-11,

7-12 - 7-14, 7-16, 7-20 - 7-22, 8-5,

9-12, 10-7

Status and Control Registers, 2-14 - 2-16 Stack Flag,

(see Flags)

Stack Fault (Interrupt 12), (see Interrupt Priorities)

Stack Manipulation Instructions, 3-2, 3-3

Stack Operations, 2-10

Grow Down, 2-11 Overview, 2-10 - 2-14 Segment Register Usage, 2-11 Segment Usage Override, 2-11 Stack Frame Base Pointer BP, 2-11 Top of Stack, 2-10, 2-11

TOS, 2-10, 2-11

with BP and SP Registers, 2-10 Status Flags, 3-4

STC Instructions, 3-25, B-I04

STD Instructions, 3-27, B-I05

STI Instructions, 2-15, 3-28,B-106

String Instructions, 3-22 - 3-24

SUB Instruction, 3-7, 3-8, B-I09

System Address Registers, 6-12

System Initialization, 10-6, 10-7

System Control Instructions, 10-3, 10-4

TEST Instruction, 3-16, B-110

TF (Trap Flags),

(see Flags)

TOS (Top of Stack),

(see Stack Operation)

TR (Task Register), 7-5

Transcendental Instruction, 3-30

TSS (Task State Segment), 8-1 - 8-9

Use of Flags with Basic Instructions, 3-4, 3-5

Virtual Address, 6-2 - 6-4

WAIT Instruction, 3-30, B-I13

XCHG Instruction, 3-1, B-114

XLAT Instruction, 3-22, B-115

XOR Instruction, 2-6, 3-10, B-116

ZF (Zero Flag),

(see Flags)

Index-6

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Intel 80287, 80286 manual Index-6