Intel 80287, 80286 manual Stack Fault Interrupt, Conditions That Invalidate the TSS

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INTERRUPTS AND EXCEPTIONS

Table 9-5. Conditions That Invalidate the TSS

Reason

Error Code

The limit in theTSSdescriptor is less than 43

TSS id + EXT

Invalid LOT selector or LOT not present

LOTid + EXT

Stack segment selector is null

SS id + EXT

Stack segment selector is outside table limit

SS id + EXT

Stack segment is not a writable segment

SS id + EXT

Stack segment OPL does not match new CPL

SS id + EXT

Stack segment selector RPL;6CPL

SS id + EXT

Code segment selector is outside table limit

CS id + EXT

Code segment selector does not refer to code segment

CS id + EXT

Non-conforming code segment OPL;6CPL

CS id + EXT

Conforming code segment OPL>CPL

CS id + EXT

OS or ES segment selector is outside table limits

ES/OS id + EXT

OS or ES are not readable segments

ES/OS id + EXT

The error code has the form shown in Table 9-5. The EXT bit will be set if an event external to the program caused an interrupt that subsequently referenced a not-present segment. Bit 1 will be set if the error code refers to an IDT entry, e.g., an INT instruction referencing a not-present gate. The

upper 14 bits are the upper 14 bits of the segment selector involved.

.

During a task switch, when a not-present exception occurs, the ES and DS segment registers may not be usable for referencing memory (the selector values are loaded before the descriptors are checked). The not-present handler should not rely on being able to use the values found in ES, SS, and' DS without causing another exception. This is because the task switch itself may have changed the values in the registers. The exception occurs in the new task and the return pointer points to the first instruc~ tion oUhe new task. Caution: the loading of the DS or ES descriptors may not have been completed. The exception II handler should ensure that the DS and ES descriptors have been properly loaded before the execution of the first instruction of the new task.

9.6.6 Stack Fault (Interrupt 12)

Stack underflow or overflow causes exception 12, as does a not-present stack segment referenced during an inter-task or inter-level transition. This exception is fully restartable. A limit violation of the current stack results in an error code of O. The EXT bit of the error code tells whether an interrupt external to the; pfugfiifii cau5ed the cAccption.

Any instruction that loads a selector to SS (e.g., POP SS, task switch) can cause this exception. This exception must use a task gateifthere is a possibility that any level 0 stack may not be present.

When a stack fault occurs, the ES and DS segment registers may not be usable for referencing memory. During a task switch, the selector values are loaded before the descriptors are checked. The stack fault handler should check the saved values <if SS, CS, DS, and ES to be sure that they refer to present segments before restoring them.

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Page 174
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Intel 80287, 80286 manual Stack Fault Interrupt, Conditions That Invalidate the TSS