Intel 80287, 80286 Type Conversion and No-Operation Instructions, Test and Compare Instructions

BASIC INSTRUCTION SET

3.4.3 Type Conversion and No-Operation Instructions

The type conversion instructions prepare operands for division. The NOP instruction is a I-byte filler instruction with no effect on registers or flags.

CWD (Convert Word to Double-Word)extends the sign of the word in register AX throughout register DX. CWD does not affect any flags. CWD can be used to produce a double-length (double-word) dividend from a word before a word division.

CBW (Convert Byte to Word) extends the sign of the byte in register AL throughout AX. CBW does not affect any flags.

Example: CWD. Sign-extends the I6-bit value in AX to a 32-bit value in DX and AX with the high- order I6-bits occupying DX.

NOP (No Operation) occupies a byte of storage but affects nothing but the instruction pointer, IP. The amount of time that a NOP instruction requires for execution varies in proportion to the CPU clocking rate. This variation makes it inadvisable to use NOP instructions in the construction of timing loops because the operation of such a program will not be independent of the system hardware configuration.

Example: NOP. The processor performs no operation for 2 clock cycles.

3.5 TEST AND COMPARE INSTRUCTIONS

The test and compare instructions are similar in that they do not alter their operands. Instead, these instructions perform operations that only set the appropriate flags to indicate the relationship between the two operands.

TEST (Test) performs the logical "and" of the two operands, clears OF and DF, leaves AF undefined, and updates SF, ZF, and PF. The difference between TEST and AND is that TEST does not alter the destination operand.

Example: TEST BL,32. Performs a logical "and" and sets SF, ZF, and PF according to the results of this operation. The contents of BL remain unchanged.

CMP (Compare) subtracts the source operand from the destination operand. It updates OF, SF, ZF, AF, PF, and CF but does not alter the source and destination operands. A subsequent signed or unsigned conditional transfer instruction can test the result using the appropriate flag result.

CMP can compare two register operands, a register operand and a memory operand, a register operand and an immediate operand, or an immediate operand and a memory operand. The operands may be words or bytes, but CMP cannot compare a byte with a word.

Example: CMP BX,32. Subtracts the immediate operand, 32, from the contents of EX and sets OF, SF, ZF, AF, PF, and CF to reflect the result. The contents of BX remain unchanged.

3.6 CONTROL TRANSFER INSTRUCTIONS

The 80286 provides both conditional and unconditional program transfer instructions to direct the flow of execution. Conditional program transfers depend on the results of operations that affect the flag register. Unconditional program transfers are always executed.

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