Intel 80286, 80287 manual Sgdt /SIDT-Store Global/Interrupt Descriptor Table Register, 101

THE 80286 INSTRUCTION SET

SGDT /SIDT-Store Global/Interrupt Descriptor Table Register

Opcode			Instruction	Clocks	Description
OF	01	/0	SGDT m	11	Store Global Descriptor Table register to m
OF	01	/1	SIDT m	12	Store Interrupt Descriptor Table register to m

FLAGS MODIFIED

None

FLAGS UNDEFINED

None

OPERATION

The contents of the descriptor table register are copied to six bytes of memory indicated by the operand. The LIMIT field of the register goes to the first word at the effective address; the next three bytes get the BASE field of the register; and the last byte is undefined.

SGDT and SIDT appear only in operating systems software; they are not used in applications programs.

PROTECTED MODE EXCEPTIONS

#UD if the destination operand is a register. #GP(O) if the destination is in a non-writable segment. #GP(O) for an illegal memory operand effective address in the CS, DS, or ES segments; #SS(O) for an illegal address in the SS segment.

REAL ADDRESS MODE EXCEPTIONS

These instructions are valid in Real Address mode to facilitate power-up or to reset initialization prior to entering Protected mode.

#UD if the destination operand is a register. Interrupt 13 for a word operand at offset OFFFFH.

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