Intel 80287, 80286 manual Tables, Storage Allocation Directives

Models: 80287 80286

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TABLE OF CONTENTS

Figure

Title

Page

3-1

Software Routine to Recognize the 80287

3-3

4-1

Conditional Branching for Compares

4-2

4-2

Conditional Branching for FXAM

4-2

4-3

Full-State Exception Handler

4-5

4-4

Reduced-Latency Exception Handler

4-5

4-5

Reentrant Exception Handler

4-6

4-6

Floating-Point to ASCII Conversion Routine

4-7

4-7

Calculating Trigonometric Functions

4-18

Tables

Table

Title

 

Page

1-1

Numeric Processing Speed Comparisons

1-2

1-2

Numeric Data Types

1-6

1-3

Principal NPX Instructions

1-6

1-4

Interpreting the NPX Condition Codes

1-11

1-5

Real Number Notation

1-17

1-6

Rounding Modes

1-19

1-7

Denormalization Process

1-22

1-8

Exceptions Due to Denormal Operands

......................... 1-23

1-9

Unnormal Operands and Results

1-24

1-10

Zero Operands and Results

1-26

1-11

Masked Overflow Response with Directed Rounding

1-27

1-12

Infinity Operands and Results

1-28

1-13

Binary Integer Encodings

,.................. 1-29

1-14

Packed Decimal Encodings

1-30

1-15

Real and Long Real Encodings

1-31

1-16

Temporary Real Encodings

1-32

1-17

Exception Conditions and Masked Responses

1-35

2-1

Data Transfer Instructions

2-3

2-2

Arithmetic Instructions

2-5

2-3

Basic Arithmetic Instructions and Operands

2-6

2-4

Condition Code Interpretation after FPREM

;

2-9

2-5

Comparison Instructions

2-10

2-6

Condition Code Interpretation after FCOM

2-10

2-7

Condition Code Interpretation after FTST

2-11

2-8

FXAM Condition Code Settings

...................... 2-12

2-9

Transcendental Instructions

2-13

2-10

Constant Instructions

2-14

2-11

Processor Control Instructions

2-15

2-12

Key to Operand Types

2-21

2- ~i 3

Execuiiur I PE:naitiE:5

2-22

2-14

Instruction Set Reference Data

2-24

2-15

PLfM-286 Built-In Procedures

2-39

2-16

80287 Storage Allocation Directives

............. 2-40

2-17

Addressing Mode Examples

2-43

3-1

NPX Processor State Following Initialization

3-5

3-2

Precedence of NPX Exceptions

3-7

A-1

80287 Instruction Encoding

A-1

A-2

Machine Instruction Decoding Guide

A-2

viii

Page 350
Image 350
Intel 80287, 80286 manual Tables, Storage Allocation Directives