Intel 80287, 80286 manual System Initialization

80286 SYSTEM INITIALIZATION

Define layout of a desc~l~tor!

des.	s t	r u c
limit	dw	Offset of last byte In segment
bale_low	dw	Low 16 bits of 24-blt address
b a I!_h I g h	db	Hlgh,8 bit. of 24-blt addrels
a •• ess	db	,Access rlg~tl byte
res	dw	Reserved wo'rd
des.	ends

'D e fin e 't h'e' fixe d GDT I! I e c tor, val u e s 1. 0 r the des c rip' tors ,t hat

de fin e 't hO EP ROM - ba,l! d tab I e I. BLD286m us t be in. t r u,c ted top I ace the ~pproprlat. des~rl~tors Int,o the GDT.

gdt_allas	equ	I "s I z'e	des 'c
I d t_alla.	equ	2"slze	desc
s tar t_TSS_a I I a s	equ	3"slze	desc
s tar t_ t a I •	equ	4,. 1,1 z e,	des cf
s tar t_L DT_a I I BI	e q'u	5 " s,l z!	desc

GDT (I) I I date segm,ent I,n RAM' for GDT GDH2) I. data segment In RAM for IDT

., GDH3) Is data segment In RAM for TSS GDH4) I. TSS for starting ta •• GDHS) Is da te segment I n, RAM for LDT

	Define machine Itatus word bit pOs'ltlonS,..
PE	I	Pro t e c t Ion en ab 'I e
MP	2	Monitor	procelsor	extension
EM	4	Emulate	procelsor	extension

Defl~e )artl~.ia~ values of de.crlptor acce~Irlghts byte.

DT_ACCESS	equ	82,H	Access byh value for an LDT
DS_ACCESS	equ	92H	Acce.s byte value for date segment
			which	Is	g row .u p.		at	level o•		wrlteable
TS LA CCESS	equ	81H	Access	byte val u'e			for	an	I die TSS
DPL	equ	60H	Privilege		level	f1 e I,d		of	a c,c e. s	rights
ACCESSED	equ	I	Define acces.ed bit
T I	equ	4	Position of TI bit
TSS_SIZE	e q'u"	44	Size of	a	TSS
LDT_OFFSET	equ	42	Position of LDT In TSS
T1R PL_MA SK	equ	• I z e desc-I	. T I end RPL		f1 e I d	~alk

Pass contr~1 from the power-up addresl to the mode Iwltch code. The segme~t containing thll code must be at phy~l~al address FFFEIOH

.to place ~he JMP Inltructlon a~ phySical add~ess FFFFFOH. Jhe base 'cddr:~~ !~ chosen eC~Drdln~ t . the size of this segment.

legment er

cs_offletequ org jmp

OFEIOH	Low	16 bits of starting address
OFFFOH-cs_offset; Start at addresl FFFFFOH
	Do	not change CS!