ISDN Interfaces

Timing and Synchronization

The Strata CTX processor time switch is synchronized as the slave to the PRI, BRI, or T1 line (Line 1 in Figure 7-31).

If a malfunction occurs and Primary reference synchronization is lost, the Strata CTX automatically switches modes and synchronizes to the Secondary reference, provided that there is another PRI, BRI, or T1 installed in the Strata CTX system.

 

 

Strata CTX

 

 

 

 

 

 

Processor PCB

 

 

 

 

 

 

Synchronization

 

 

 

 

 

 

 

Circuit

 

 

 

 

 

 

 

Time

 

 

 

 

 

 

Clock

Switch

 

 

 

 

 

Digital

 

 

Primary Reference PCB*

 

 

 

 

 

 

 

 

Public Switched

 

Telephone

PDKU

 

 

Synchronization

Line 1

 

 

 

 

 

Telephone

 

 

 

 

SS1

Circuit

 

Network (PSTN)

 

 

 

 

 

Digital Voice

 

PRI, BRI, or T1

 

 

 

Path

 

 

 

 

Standard

 

 

Path

 

 

 

 

 

 

 

 

 

 

Voice

 

 

 

 

 

Telephone

RSTU

Secondary Reference PCB*

 

 

 

 

 

Transmission

 

Synchronization

Line 2

AT&T or

Stratum-1

 

 

 

other provider

Clock

 

 

 

 

 

 

 

SS2

Circuit

 

PRI, BRI, or T1

Source

 

 

 

 

Digital Voice

 

 

 

 

 

 

 

Path

 

 

 

 

 

Digital

 

 

 

Clock synchronized properly

 

 

Other RDTU, RPTU, or RBSU

 

with Stratum-1 Clock Source

 

 

 

 

 

 

 

 

CTX

 

Synchronization

Line 3

Other

Other

 

 

SS3

Circuit

 

 

 

 

PRI, BRI, or T1

Clock

 

 

 

 

Digital Voice

 

provider

Source

 

 

 

 

Path

 

 

 

 

5439

 

 

 

Clock not synchronized properly

 

 

 

 

 

with Stratum-1 Clock Source

 

 

 

 

 

 

 

Figure 7-31 Primary and Secondary References

Figure 7-31shows the Primary reference PCB. The clock signal from Line 1 passes through the PCB Software Switch (SS1) and the synchronization circuit of the RCTU PCB. The RCTU clock passes the clock source through the time switch and synchronizes the Strata CTX digital transmission voice or data path.

The Secondary reference is activated if the Primary reference fails. The Strata CTX automatically switches over to the Secondary reference PCB by opening its synchronization circuit (SS1) and closing the synchronization circuit (SS2). When this occurs, the digital voice or data path of the Strata CTX is synchronized to the Line 2 clock source.

If the path is not synchronized to the Stratum – 1 clock source, calls connected through that path experience “slipping” or “jitter” in the digital voice or data path (channels). Figure 14-7 shows an unsynchronized signal from Line 3. The unsynchronized signal produces a clicking or popping sound that is heard by the people connected through this path or causes data errors on data transmissions.

7-36

Strata CTX I&M 06/04

Page 302
Image 302
Toshiba CTX28 manual Primary and Secondary References