User’s Manual

IBM PowerPC 750GX and 750GL RISC Microprocessor

output the 4-bit resource ID (RID) field located in the EAR. The eciwx instruction also loads a word from the data bus that is output by the special device. For more information about the relationship between these instructions and the system interface, see Chapter 7, Signal Descriptions, on page 249.

2.3.6 PowerPC OEA Instructions

The PowerPC operating environment architecture (OEA) includes the structure of the memory-management model, supervisor-level registers, and the exception model. Implementations that conform to the OEA also adhere to the UISA and the VEA. This section describes the instructions provided by the OEA.

2.3.6.1 System Linkage Instructions—OEA

This section describes the system linkage instructions (see Table 2-40). The user-level sc instruction lets a user program call on the system to perform a service and causes the processor to take a system-call excep- tion. The supervisor-level rfi instruction is used for returning from an exception handler.

Table 2-40. System Linkage Instructions—OEA

Name

Mnemonic

Syntax

Implementation Notes

 

 

 

 

 

 

 

 

System Call

sc

—

The sc instruction is context-synchronizing.

 

 

 

 

Return from

 

 

The rfi instruction is privileged and context-synchronizing. For the 750GX, this

rfi

—

means the rfi instruction works its way to the final stage of the execution pipeline,

Interrupt

 

 

updates architected registers, and redirects the instruction flow.

 

 

 

 

 

 

 

2.3.6.2 Processor Control Instructions—OEA

This section describes the processor control instructions used to access the MSR and the SPRs. Table 2-41lists instructions for accessing the MSR.

Table 2-41. Move-to/Move-from Machine State Register Instructions

Name

Mnemonic

Syntax

 

 

 

 

 

 

Move-to Machine State Register

mtmsr

rS

 

 

 

Move-from Machine State Register

mfmsr

rD

 

 

 

The OEA defines encodings of mtspr and mfspr to provide access to supervisor-level registers. The instructions are listed in Table 2-42.

Table 2-42. Move-to/Move-from Special-Purpose Register Instructions (OEA)

Name

Mnemonic

Syntax

 

 

 

 

 

 

Move-to Special-Purpose Register

mtspr

SPR,rS

 

 

 

Move-from Special-Purpose Register

mfspr

rD,SPR

 

 

 

Encodings for the architecture-defined SPRs are listed in Table 2-33on page 109. Encodings for 750GX- specific, supervisor-level SPRs are listed in Table 2-34on page 112. Simplified mnemonics are provided for mtspr and mfspr in Appendix F, “Simplified Mnemonics” in the PowerPC Microprocessor Family: The Programming Environments Manual. For a discussion of context synchronization requirements when altering certain SPRs, see Appendix E, “Synchronization Programming Examples” in the PowerPC Microprocessor Family: The Programming Environments Manual.

Programming Model

gx_02.fm.(1.2)

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March 27, 2006