IBM 750GL, 750GX 3.7 MEI State Transactions

User’s Manual

IBM PowerPC 750GX and 750GL RISC Microprocessor

3.7 MEI State Transactions

Table 3-7shows MEI state transitions for various operations. Bus operations are described in Table 3-4on page 141.

Table 3-7. MEI State Transitions (Page 1 of 3)

	Cache	Bus		Current	Next
Operation			WIM	Cache	Cache	Cache Actions	Bus Operation
	Operation	Sync
				State	State
						Cast out of modified block (as	Write-with-kill
Load (T = 0)	Read	No	x0x	I	Same	required).
						Pass 4-beat read to memory queue.	Read
Load (T = 0)	Read	No	x0x	E,M	Same	Read data from cache.	—
Load (T = 0)	Read	No	x1x	I	Same	Pass single-beat read to memory	Read
						queue.
Load (T = 0)	Read	No	x1x	E	Same	Pass single-beat read to memory	Read
						queue.
Load (T = 0)	Read	No	x1x	M	Same	Pass single-beat read to memory	Read
						queue.
lwarx	Read	Acts like other reads but bus operation uses special encoding.
						Cast out of modified block (if neces-	Write-with-kill
Store (T = 0)	Write	No	00x	I	Same	sary).
						Pass RWITM to memory queue.	RWITM
Store (T = 0)	Write	No	00x	E,M	M	Write data to cache.	—
Store ¦ stwcx.	Write	No	10x	I	Same	Pass single-beat write to memory	Write-with-flush
(T = 0)						queue.
Store ¦ stwcx.						Write data to cache.	—
	Write	No	10x	E	Same
						Pass single-beat write to memory
(T = 0)							Write-with-flush
						queue.
Store ¦ stwcx.	Write	No	10x	M	Same	Push block to write queue.	Write-with-kill
(T = 0)
Store (T = 0)	Write	No	x1x	I	Same	Pass single-beat write to memory	Write-with-flush
or stwcx.						queue.
Store (T = 0)	Write	No	x1x	E	Same	Pass single-beat write to memory	Write-with-flush
or stwcx.						queue.
Store (T = 0)						Pass single-beat write to memory	Write-with-flush
	Write	No	x1x	M	Same	queue.
or stwcx.
						Push block to write queue	Write-with-kill
stwcx.	Conditional	If the reserved bit is set, this operation is like other writes except the bus operation uses a special
	write	encoding.
dcbf	Data-cache-	No	xxx	I,E	Same	Pass flush.	Flush
	block flush			Same	I	State change only.	—
dcbf	Data-cache-	No	xxx	M	I	Push block to write queue.	Write-with-kill
	block flush
Note: Single-beat writes are not snooped in the write queue.

gx_03.fm.(1.2)	Instruction-Cache and Data-Cache Operation
March 27, 2006	Page 147 of 377