User’s Manual

IBM PowerPC 750GX and 750GL RISC Microprocessor

Interrupt

These signals include the interrupt signal, checkstop signals, and both soft reset

 

and hard reset signals. These signals are used to generate interrupt exceptions

 

and, under various conditions, to reset the processor.

Processor status/control

These signals are used to indicate miscellaneous bus functions.

Clocks

These signals determine the system clock frequency. These signals can also be

 

used to synchronize multiprocessor systems.

Test and control

The common on-chip processor (COP) unit provides a serial interface to the

 

system for performing board-level boundary scan interconnect tests.

Note: A bar over a signal name indicates that the signal is active low—for example, ARTRY (address retry) and TS (transfer start). Active-low signals are referred to as asserted (active) when they are low and as negated when they are high. Signals that are not active low, such as A[0–31] (address-bus signals) and TT[0–4] (transfer type signals) are referred to as asserted when they are high and as negated when they are low.

1.2.8 Signal Configuration

Figure 1-4shows the 750GX’s logical pin configuration. The signals are grouped by function.

PowerPC 750GX Overview

gx_01.fm.(1.2)

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March 27,2006