IBM 750GL, 750GX 1.7.2 750GX Microprocessor Exception Implementation

User’s Manual

IBM PowerPC 750GX and 750GL RISC Microprocessor

The PowerPC Architecture supports four types of exceptions:

Synchronous,	These are caused by instructions. All instruction-caused exceptions are handled
precise	precisely. That is, the machine state at the time the exception occurs is known and
	can be completely restored. This means that (excluding the trap and system call
	exceptions) the address of the faulting instruction is provided to the exception
	handler and that neither the faulting instruction nor subsequent instructions in the
	code stream will complete execution before the exception is taken. Once the
	exception is processed, execution resumes at the address of the faulting instruc-
	tion (or at an alternate address provided by the exception handler). When an
	exception is taken due to a trap or system call instruction, execution resumes at an
	address provided by the handler.
Synchronous,	The PowerPC Architecture defines two imprecise floating-point exception modes,
imprecise	recoverable and nonrecoverable. Even though the 750GX provides a means to
	enable the imprecise modes, it implements these modes identically to the precise
	mode (that is, enabled floating-point exceptions are always precise).
Asynchronous,	The PowerPC Architecture defines external and decrementer interrupts as
maskable	maskable, asynchronous exceptions. When these exceptions occur, their handling
	is postponed until the next instruction, and any exceptions associated with that
	instruction completes execution. If no instructions are in the execution units, the
	exception is taken immediately upon determination of the correct restart address
	(for loading SRR0). As shown in the Table 1-4, 750GX Microprocessor Exception
	Classifications, the 750GX implements additional asynchronous, maskable excep-
	tions.
Asynchronous,	There are two nonmaskable asynchronous exceptions: system reset and the
nonmaskable	machine-check exception. These exceptions might not be recoverable, or might
	provide a limited degree of recoverability. Exceptions report recoverability through
	the MSR[RI] bit.

1.7.2 750GX Microprocessor Exception Implementation

The 750GX exception classes described above are shown in the Table 1-4. Although exceptions have other characteristics, such as priority and recoverability, Table 1-4describes the precise or imprecise characteristics of exceptions the 750GX uniquely handles. Table 1-4includes no synchronous imprecise exceptions; although the PowerPC Architecture supports imprecise handling of floating-point exceptions, the 750GX implements these exception modes precisely.

Table 1-4. 750GX Microprocessor Exception Classifications

Synchronous/Asynchronous	Precise/Imprecise	Exception Type
Asynchronous, nonmaskable	Imprecise	Machine check, system reset
Asynchronous, maskable	Precise	External, decrementer, system-management, performance-monitor,
		and thermal-management interrupts
Synchronous	Precise	Instruction-caused exceptions

Table 1-5on page 50 lists the 750GX exceptions and conditions that cause them. Exceptions specific to the 750GX are indicated.

gx_01.fm.(1.2)	PowerPC 750GX Overview
March 27,2006	Page 49 of 377