Intel 41210 Intel 41210 Serial to Parallel PCI Bridge Developers Manual 59, Figure 9. DWord Configuration Read Protocol (SMBus Word Write/Word R ead, PEC Disab led)

Intel® 41210 Serial to Parallel PCI Bridge Developer’s Manual 59
System Management Bus Interface
Figure 8. DWord Configuration Read Protocol (SMBus Block Write/Block Read, PEC
Disabled)
Figure 9. DWord Configuration Read Protocol (SMBus Word Write/Word R ead, PEC Disab led)
B3189-01
W Cmd = 11000010
S 11X0_XXX W A Cmd = 11000010 A Byte Count = 4 A Bus Number A A Reg Number [15:8] ADevice/Function
Reg Number [7:0] Clock Stretch AP
Sr 11X0_XXX
S 11X0_XXX
R A Byte Count = 5 A
AA
Status A Data[31:24] A A Data[15:8] A Data[7:0] N PData[23:16]
B3190-01
W Cmd = 10000001
S 11X0_XXX W A Cmd = 10000001 A
S 11X0_XXX W A Cmd = 01000001 A
Bus Number A Device/Function A P
Register Num[7:0]Register Num[15:8] AClock Stretch AP
Sr 11X0_XXX
S 11X0_XXX
RA A
AA
Status Data[31:24] N P
W Cmd = 00000001
Sr 11X0_XXX
S 11X0_XXX
RA A
AA
Data[23:16] Data[15:8] N P
W Cmd = 01000000
Sr 11X0_XXX
S 11X0_XXX
RA
AA
Data[7:0] N P