44 Intel® 41210 Serial to Parallel PCI Bridge Developer’s Manual
Addressing
•Type 1-to-Type 1 Forwarding:
The 41210 passes a Type1 PCI Express* configuration cycle as a Type1 configuration cycle
on PCI when it is intended for a device attached to a bus below the bridge and beyond the bus
directly attached to the secondary side of the bridge.
The 41210 forwards a Type1 configuration cycle unchanged to the PCI bus when the Type 1
configuration cycle on PCI Express* has a bus number that falls in the range defined by the
lower limit (exclusive) in the secondary bus number register and the upper limit (inclusive) in
the subordinate bus number register.
As an error response, the 41210 returns an “unsupported request” completion when the
extended address bits are non-zero.
Note: The device-hiding bit in the BINIT register has no effect when forwarding a Type 1 transaction to
PCI as a Type1 transaction.
•Type1 to Special Cycle Forwarding
The 41210 translates a Type1 configuration write transaction on PCI Express* into a special
cycle on PCI, but does not translate a Type1 configuration access on PCI to a special cycle on
PCI Express*. A PCI Express* Type1 configuration cycle is be converted to a special cycle on
the PCI interface when all of the following conditions are true:
— The device number field is equal to 11111b.
— The function number field is equal to 111b.
— The register number field is equal to 000000b.
— The bus number is equal to the value in the secondary bus number register in
configuration space.
The address and data are forwarded unchanged. Devices ignore the address and decode only
the bus command. The data phase contains the special cycle message. The transaction master-
aborts on PCI, but results in a normal completion on the opposite bus (normal completion
status on PCI Express*; no DEVSEL# on PCI).
5.3.2 Type 0 Configuration Access from PCI-X Interface
The 41210 supports inbound Type0 configuration accesses from PCI-X to access registers on the
corresponding source bridge segment. Type0 accesses from PCI-X cannot be used to access
registers in any other functions within the 41210 other than the source br idge segment ; nor can it b e
used to access devices upstream of the 41210.
Figure 2. Type 1 to Type 0 Translation (PCI and PCI-X)
B3183-01
Reserved Bus No Dev No Fnc Register
Ext.
Add=0
R
31 2627282930 232425 19202122 15161718 1214 13 891011 45673210
Only one '1'
PCI Address
PCI Express Header
0000
00
Fnc Register