Intel 80C188XL, 80C186XL user manual A158, Rfsh, A150, Dt/R Den

BUS INTERFACE UNIT

TOE, TACC and TCE define the maximum data access requirements for the memory device. These device parameters must be less than the value calculated in the equation column. An equal to or greater than result indicates that wait states must be inserted into the bus cycle.

TDF determines the maximum time the memory device can float its outputs before the next bus cycle begins. A TDF value greater than the equation result indicates a buffer fight. A buffer fight means two (or more) devices are driving the bus at the same time. This can lead to short circuit conditions, resulting in large current spikes and possible device damage.

TRHAX cannot be lengthened (other than by slowing the clock rate). To resolve a buffer fight con- dition, choose a faster device or buffer the AD bus (see “Buffering the Data Bus” on page 3-34).

		T1	T2	T3	T4
CLKOUT
	S2:0	Status Valid
	ALE
	A19:16	Address Valid		A18:16 = 0, A19=Valid Status
BHE	A15:8			Valid
	RFSH
	A15:0	Address			Data
	[AD7:0]	Valid			Valid
	RD
	DT/R
	DEN
					A1046-0A

Figure 3-19. Typical Read Bus Cycle

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